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Routing in VLSI-layout

Routing in VLSI-layout This paper reports on algorithmic approaches for the routing problem of VLSI-logic-chips using combinatorial optimization techniques. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Acta Mathematicae Applicatae Sinica Springer Journals

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Publisher
Springer Journals
Copyright
Copyright © 1991 by Science Press, Beijing, China and Allerton Press, Inc., New York, U.S.A.
Subject
Mathematics; Applications of Mathematics; Math Applications in Computer Science; Theoretical, Mathematical and Computational Physics
ISSN
0168-9673
eISSN
1618-3932
DOI
10.1007/BF02080203
Publisher site
See Article on Publisher Site

Abstract

This paper reports on algorithmic approaches for the routing problem of VLSI-logic-chips using combinatorial optimization techniques.

Journal

Acta Mathematicae Applicatae SinicaSpringer Journals

Published: Jul 13, 2005

References