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Heterogeneous integration by adhesive bonding

Heterogeneous integration by adhesive bonding Wafer level adhesive bonding has been applied for the fabrication of micro systems which have heterogeneous components on LSI. Films or MEMS devices formed on a carrier wafer are transferred on a LSI wafer, which makes versatile heterogeneous integration possible. Film transfer processes and device transfer processes have been developed and applied to mirror array, resonator, piezoelectric switch, IR imager, tactile sensor, electron source and so on. Selective bonding to transfer devices on one carrier wafer to multiple LSI wafers has been developed. Keywords: Integrated MEMS; Heterogeneous integration; Adhesive bonding; Wafer level transfer Introduction Various adhesive bonding methods have been devel- Integrated MEMS (micro electro mechanical systems) oped [3]. The adhesive wafer bonding can be applied as capacitive sensors and arrayed display have been not only to the wafer level heterogeneous integration produced successfully. MEMS as switches and filters but also other purposes as three-dimensional IC, fabricated on CMOS LSI are needed for future multi- wafer-level packaging or microfluidics [4]. The wafer band wireless systems, in which good mechanical level transfer using the adhesive bonding has been properties or piezoelectric materials are required for studied in KTH in Sweden [5]. The heterogeneous in- the MEMS and state of the art for the LSI. Such het- tegration processes are shown in Figure 3. These can erogeneous integration can be performed by transfer- be categorized to film transfer process (Figure 3(a) and ring MEMS devices or a film fabricated on a carrier II), (b) device transfer process (via-last) (Figure 3(b) wafer to a LSI wafer by adhesive bonding as shown in and III) and (c) device transfer process (via-first) (Fig- Figure 1. The LSI wafer is not damaged during the ure 3(c) and IV). The details and applications of these MEMS fabrication because the MEMS and the film are processes will be described below in II, III and IV. fabricated on a separated carrier wafer and the adhesive These heterogeneous integration processes can be ap- bonding can be carried out at low temperature. MEMS on plied not only to integrated MEMS but also to other LSI is encapsulated by WLP (wafer level packaging) [1] devices as integrated optical devices by bonding a and finally diced to each chips. compound semiconductor wafer for laser or LED to a The wafer level transfer process can be low cost CMOS LSI wafer. comparing chip level processes, however for different chip size of MEMS from that of LSI selective transfer Film transfer process process described in V is needed for cost-effective The process can be used to transfer a film from the car- manufacturing. rier wafer to the LSI wafer as shown in Figure 3 (a). The wafer level integration by the adhesive bonding After the adhesive bonding, the carrier wafer is removed was used in the past. Figure 2 is an example of this tech- and the remained film is used to fabricate MEMS de- nology presented in 1984 [2]. Stacked CMOS LSI was vices on the LSI wafer. The MEMS fabrication process fabricated by bonding a PMOS wafer to a NMOS wafer on the LSI wafer has to be compatible with the inte- with polyimide. grated circuit. * Correspondence: esashi@mems.mech.tohoku.ac.jp The World Premier International Research Center Advanced Institute for Materials Research (WPI-AIMR), Tohoku University, 519-1176 Aramaki-Aza-Aoba, Aoba-ku, Sendai 980-0845, Japan Full list of author information is available at the end of the article © 2013 Esashi and Tanaka; licensee Springer. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 2 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 1 Concept of MEMS on LSI by adhesive bonding and wafer level packaging. A. Monocrystalline-Si mirror array on CMOS LSI Device transfer process (via last) A high resolution SLM (spatial-light-modulator) chip with The device transfer processes have advantages that the 1 million tilting micromirrors made of monocrystalline MEMS can be fabricated independently from the LSI Si was developed [6]. The fabrication process and the wafer. This enables wide range and optimized MEMS photograph are shown in Figure 4. The mirror exhibits low structures on LSI. In the via-last process the electrical surface roughness and drift free operation comparing metal interconnections from the MEMS to the LSI are made mirror because of the creep-free mechanical properties of by metal vias after the transfer as shown in Figure 3 (b). the monocrystalline Si. C. PZT MEMS switch PZT (lead zirconate titanate) actuated MEMS switches B. CMOS-FBAR voltage controlled oscillator were fabricated on a LSI wafer as shown in Figure 6 [8]. A wide-tuning CMOS-FBAR (film bulk acoustic reson- ator) based VCO (voltage controlled oscillator) for 2.45 GHz has been developed on 0.18 μm CMOS LSI [7]. The fabrication process, the circuit and the photograph are shown in Figure 5. Thin Si layer is formed on the CMOS wafer by adhesive bonding of a flipped SOI by BCB (benzocycrobutene) and removal of handle Si layer. A Ru and an AlN is sputter deposited and patterned re- spectively. Top Al electrode is fabricated by lift-off. Sac- rificial etching is performed to remove the Si and the BCB underneath the FBAR to make an air gap. The cir- cuit is a Pierce oscillator in which electrical frequency Figure 2 Stacked CMOS LSI by bonding with polyimide [2]. tuning can be done by connecting capacitors digitally. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 3 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 3 Heterogeneous integration processes; (a) Film transfer process, (b) Device transfer process (via-last), (c) Device transfer process (via-first). Figure 4 Monocrystalline-Si mirror array on CMOS wafer [6]. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 4 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 5 CMOS-FBAR voltage controlled oscillator. The piezoelectric MEMS switch works at lower driv- Figure 7. The via last device transfer was applied for ing voltage and occupies smaller area than electro- this process. static MEMS switches. For the MEMS switch, the PZT was deposited on a Si wafer by a sol–gel E. Tactile sensor network method. In order to prevent a bending symmetrical Distributed tactile sensors (tactile sensor network) are structure made of two stacked PZT layers is formed needed on the skin of robots to ensure their safety. and then patterned into device structures. They are These enable practically applicable nursing care robots transferred to the LSI wafer using the adhesive and so on. A tactile sensor network which acquires sens- bonding. After connecting the MEMS and the LSI ing data from each tactile sensor element by autono- using electroplated vias, the polymer was removed mous data transmission (event driven) is shown in by O plasma to release the MEMS switches. The Figure 8 [10]. The tactile sensor chips are connected to PZT cantilever bended downward by 6 μm by apply- a flexible cable having common 4 wires for power, ing 10V to the lower PZT layer. The piezoelectric ground and signal lines as shown in the photograph. MEMS also enable wide range variable MEMS ca- Capacitive tactile force sensors were formed on a com- pacitors owing to their no pull-in phenomena com- munication LSI by adhesive bonding using the BCB. The paring to the electrostatic MEMS. function of the communication LSI for the event driven data transmission was confirmed. D. Infrared Imager Array of free-hanging poly Si bolometer was developed Device transfer process (via-FIRST) for CMOS-based uncooled infrared imager [9]. The The via-first device transfer process from the carrier fabrication process and the photograph are shown in wafer to the LSI wafer uses metal bumps for the Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 5 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Structure and photograph Figure 7 Infrared imager [9]. accelerometers and three-axis gyroscope at large vol- ume for consumer product [11]. The MEMS wafer is used as a package and the process (Nasiri fabrica- tion) uses Al/Ge eutectic bonding at 450°C for elec- trical interconnection and the package sealing simultaneously. F. AFM based data storage (Millipede) (b) Fabrication process Fabrication process for arrays of AFM (atomic force Figure 6 PZT MEMS switch on LSI; (a) Structure and microscope) probe on CMOS LSI is shown in Figure 9 photograph, (b) Fabrication process. [12]. This was developed for a multi probe data stor- age called Millipede. The AFM probes fabricated on a SOI wafer is transferred by polyimide bonding to a glass wafer which has PTFE (Tellon) film on it and electrical interconnection and the mechanical holding of removal of the handle Si layer. Thereafter Cu-Ni-Ti MEMS devices as shown in Figure 3(c). The metal to and adhesive polyimide are patterned on the backside metal bump bonding methods as metal compression (1. MEMS process in Figure 9). Sn-Cu bumps are bonding and solder bonding can be used. There are formed on a CMOS wafer (2. CMOS bump process some variations of the solder bonding as eutectic bond- in Figure 9). The MEMS wafer is bonded to the ing or TLP (transient liquid phase) bonding which is CMOS wafer (3. wafer-level heterogeneous integration called SLID (solid-liquid Inter-diffusion bonding) as well. process in Figure 9). The Sn melt at the bonding The via-first process does not need electrical intercon- temperature (380°C) and diffuse into the Cu. This nection after the device transfer. makes intermetallic compound of which remelting Adhesives are not mandatory for the via-first de- temperature is higher than 500°C and hence the de- vice transfer process but are used for temporary vices stand post transfer soldering. This metal bond- bonding of the devices on the carrier wafer or for an ing is called TLP or SLID. Debonding of the glass underfill (mechanical support). The via-first device waferisdonebylaser ablation throughthe glass transfer process without adhesive bonding has been wafer and finally the polyimide used for the device applied for manufacturing of combined three-axis transfer is etched out using O plasma. 2 Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 6 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Sensors on a flexible circuit, signal waveform and structure (b) Fabrication process Figure 8 Tactile sensor network; (a) Sensors on a flexible circuit, signal waveform and structure, (b) Fabrication process. G. Active matric electron emitter for massive parallel speed massively parallel direct write EB (electron electron beam exposure systems beam) exposure system [13]. A nc-Si (nanocrystalline A prototype electron emitter array integrated with an silicon) emitter used is shown in Figure 10 (a). The active-matrix driving LSI has been developed for high- nc-Si emitter consists of cascaded tunnel junction Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 7 of 10 http://www.mnsl-journal.com/content/1/1/3 Selective transfer technologies Wafer level selective transfer from one carrier wafer to multiple target wafers are needed for cost-effective inte- gration of different chip sizes [15]. One example of the technology is shown in Figure 11 [16]. MEMS devices on a glass carrier wafer are bonded to the target LSI wafer (Figure 11 (2)) and MEMS devices to be trans- ferred are debonded by laser through the glass carrier wafer (Figure 11 (3)). MEMS devices remained on the glass carrier wafer can be transferred to another target wafers (Figure 11 (4)). The selective transfer technology was applied to the SAW (surface acoustic wave) resonator on LSI as shown in Figure 12 [17]. SAW resonators are fabricated on a LiNbO wafer and the wafer is bonded to a glass carrier wafer using an adhesive and diced to make grooves (1. LiNbO SAW chip fabrication in Figure 12). The target LSI wafer is fabricated as follows. Metal (Au-Cr) pattern is made and sticky silicone bumps are also patterned on the wafer. Thereafter metal (Au-Cr) pattern is made on it (2. target silicon wafer fabrication in Figure 12). The flipped carrier wafer is bonded to the target wafer using the sticky silicone bumps. After debonding of the glass carrier wafer by laser the bump bonding is reinforced using an underfill polymer (3. integra- tion/transfer in Figure 12). The photograph of the SAW resonators transferred on a LSI wafer is showninFigure12. Conclusions Figure 9 Probe array for AFM based data storage [4,12]. The heterogeneous integration on LSI using the wafer level transfer with adhesives is reviewed. This technol- ogy enables low cost production of value added de- vices. PZT which requires higher temperature than and hence the electron emission is controlled at low 600°C for depositing a thin film can be applied on voltage (10V). A chromatic aberration is small be- LSI using this technology. Selective transfer from cause of a small energy dispersion of the emitted one wafer to multiple LSI wafers are described to electron. The structure of the active matrix emitter is cost effective production of different size MEMS showninFigure10(b) [14].The nc-Siemitter is chip from LSI chip. There are related items to this concave shaped in order to condense the electron technology as adhesives, alignment for the bonding and to collimate the electron beam using an extrac- and debonding. The adhesives can be applied by tion electrode, which is called Pierce gun. The wafer coating, stamping and film laminating. The adhesive of the nc-Si emitter is bonded to a driver LSI wafer layers can be patterned or unpatterned and can with gold bumps. 100×100 cells of the driver circuit stand relatively high temperature (400°C) as poly- are formed on a glass by adhesive bonding. The cells imide if needed. Transparent glass or self-alignment can be electrically isolated in order to apply a bias is required depending on the processes. There are voltage to the cells for electronic aberration compen- various debonding methods to remove the carrier sation. Photographs of the emitter-side and the wafer as polymer etching, sacrificial layer etching bump-side of the nc-Si emitter wafer are shown in and etching or mechanical grinding of the carrier Figure 10 (c). Resist patterning by the emitted elec- wafer. In order to remove the polymer used for the tron was successfully confirmed in preliminary wafer bonding polymer etching by ozone in acetic experiment. acid was developed [18]. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 8 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Principle and current of nc-Si emitter (b) Structure (c) Photograph of the nc-Si emitter (Pierce gun) array Figure 10 Active matrix nc-Si electron emitter; (a) Principle and current of nc-Si emitter, (b) Structure, (c) Photograph of the nc-Si emitter (Pierce gun) array. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 9 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 11 Principle of wafer level selective transfer. Figure 12 Fabrication process and photograph of SAW resonators transferred to a LSI wafer. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 10 of 10 http://www.mnsl-journal.com/content/1/1/3 Competing interests 8. Matsuo K, Moriyama M, Esashi M, Tanaka S (2012) Low-voltage PZT-actuated The authors declare that thy have no competing interests. MEMS switch monolithically integrated with CMOS circuit. Tech Digest IEEE MEMS 2012, Paris, pp 1153–1156, 29 Jan.-2 Feb 9. Niklaus F, Kälvesten E, Stemme G (2001) Wafer-level membrane transfer Authors’ contributions bonding of polycrystalline silicon bolometers for use in infrared focal plane ME organized the research works and wrote the manuscript. ST carried out arrays. J of Micromechanics Microengineering 11:509–513 the development of the heterogeneous integration by adhesive bonding. 10. Makihata M, Tanaka S, Muroyama M, Matsuzaki S, Yamada H, Nakayama T, Both authors read and approved the final manuscript. Yamaguchi U, Mima K, Nonomura Y, Fujiyoshi M, Esashi M (2012) Integration and packaging technology of MEMS-on-CMOS capacitive tactile Authors’ information sensor for robot application using thick BCB isolation layer and Masayoshi Esashi received the B.E. degree in electronic engineering in 1971 backside-grooved electrical connection. Sensors and Actuators A 188:103–110 and the Doctor of Engineering degree in 1976 at Tohoku University. He 11. Seeger J, Lim M, Nasiri S (2010) Development of high-performance, served as a research associate from 1976 and an associate professor from high-volume consumer MEMS gyroscopes, Solid-State Sensors, Actuators, 1981 at the Department of Electronic Engineering, Tohoku University. Since and Microsystems Workshop, Hilton Head Island., Transducer Research 1990 he has been a professor and he is now in The World Premier Foundation, California, USA, pp 61–64, 6–10 June International Research Center Advanced Institute for Materials Research 12. Dospont M, Drechsler U, Yu R, Pogge HR, Vettiger P (2004) Wafer-scale (WPI-AIMR) and concurrently in Micro System Integration Center (μSIC) microdevice transfer/interconnect: its application in an AFM-based (director) in Tohoku University. He has been studying microsensors, MEMS data-storage system. IEEE J of Microelectromechanical Systems 13:895–901 (Micro Electro Mechanical Systems) and integrated microsystems. 13. Ikegami N, Yoshida T, Kojima A, Ohyi H, Koshida N, Esashi M (2012) Shuji Tanaka received B.E., M.E. and Dr.E. degrees all in mechanical Active-matrix nanocrystalline Si electron emitter array for massively parallel engineering from The University of Tokyo in 1994, 1996 and 1999, direct-write electron-beam system: first results of the performance respectively. From 1996 to 1999, he was Research Fellow of the Japan evaluation. J Micro/Nanolith. MEMS MOEMS. 11: 031406(9pp) Society for the Promotion of Science. He was Research Associate at 14. Nishino H, Yoshida S, Tanaka S, Esashi M, Kojima A, Ikegami N, Koshida N Department of Mechatronics and Precision Engineering, Tohoku University (2013) Primary study of fabrication process of LSI-integrated Pierce-type from 1999 to 2001, Assistant Professor from 2001 to 2003, and Associate surface-electron-emitter array for massive parallel lithography. H25 Professor at Department of Nanomechanics from 2003 to 2013. He is Convention of IEEJ, Nagoya, 3-127, 20 March (in Japanese) currently Professor at Department of Bioengineering and Robotics. He was 15. Guerre R, Drechsler U, Jubin D, Despont M (2008) Selective transfer also Fellow of Center for Research and Development Strategy, Japan Science technology for microdevice distribution. IEEE J of Microelectromechanical and Technology Agency from 2004 to 2006, and is currently Selected Fellow. Systems 17:157–165 He was awarded The Young Scientists’ Prize, The Commendation for Science 16. Tanaka S, Yoshida M, Hirano H, Somekawa T, Fujita M, Esashi M (2013) and Technology by the Minister of Education, Culture, Sports, Science and Wafer-to-wafer selective flip-chip transfer by sticky silicone bonding and Technology in 2009 etc. His research interests include RF MEMS, MEMS-LSI laser debonding for rapid and easy integration test. Technical Digest IEEE integration and Power MEMS. MEMS 2013, Taipei, pp 271–274, 20–24 Jan 17. Tanaka S, Yoshida M, Hirano H, Esashi M (2012) Lithium niobate SAW device Acknowledgment hetero-transferred onto silicon integrated circuit using elastic and sticky This study was supported by Special Coordination Funds for Promoting bumps, 2012 IEEE International Ultrasonics Symposium., Dresden, Germany, Science and Technology, Formation of Innovation Center for Fusion of pp 1047–1050, 7–10 October Advanced Technologies and Funding Program for World-Leading Innovative 18. Yoshida S, Yanagida H, Esashi M, Tanaka S (2013) Simple removal R&D on Science and Technology. technology of chemically stable polymer in MEMS using ozone solution. J Microelectromechanical Systems 22:87–93 Author details The World Premier International Research Center Advanced Institute for doi:10.1186/2213-9621-1-3 Materials Research (WPI-AIMR), Tohoku University, 519-1176 Cite this article as: Esashi and Tanaka: Heterogeneous integration by Aramaki-Aza-Aoba, Aoba-ku, Sendai 980-0845, Japan. Department of adhesive bonding. Micro and Nano Systems Letters 2013 1:3. Bioengineering and Robotics, Tohoku University, 6-6-01 Aza Aoba, Aramaki Aobaku, Sendai 980-8579, Japan. Received: 3 March 2013 Accepted: 2 July 2013 Published: 6 August 2013 References 1. Esashi M (2008) Wafer level packaging of MEMS. J of Micromechanics and Microengineering 18(13pp):073001 2. Yamamoto M, Hayama H, Enomoto T (1984) Promissing new fabrication process developed for stacked LSI’s. Proc. The IEEE Intnal. Electron Devices Meeting, San Francisco, pp 816–819, 9–12 Dec 3. Niklaus F, Stemme G, Lu J-Q, Gutmann RL (2006) Adhesive wafer bonding. J of Applied Physics, 99:031101(28pp) 4. Lapisa M, Stemme G, Niklaus F (2011) Wafer-level heterogeneous Submit your manuscript to a integration for MOEMS, MEMS, and NEMS. IEEE J of Selected Topics in journal and benefi t from: Quqntum Electronics 17:629–644 5. Niklaus F, Enoksson P, Griss P, Kälvesten E, Stemme G (2001) 7 Convenient online submission Low-temperature wafer-level transfer bonding. IEEE J of 7 Rigorous peer review Microelectromechanical Systems 10:525–531 6. Zimmer F, Lapisa M, Bakke T, Bring M, Stemme G (2011) One-megapixel 7 Immediate publication on acceptance monocrystalline-silicon micromirror array on CMOS driving electronics 7 Open access: articles freely available online manufactured with very large-scale heterogeneous integration. IEEE J of 7 High visibility within the fi eld Microelectromechanical Systems 20:564–572 7 Retaining the copyright to your article 7. Kochhar A, Matsumura T, Zhang G, Pokharel R, Hashimoto K, Esashi M, Tanaka S (2012) Monolithic fabrication of film bulk acoustic resonators above integrated circuit by adhesive-bonding-based film transfer. 2012 IEEE Submit your next manuscript at 7 springeropen.com Ultrasonics Symposium, Dresden, pp 5E–3, 7–10 Oct http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Micro and Nano Systems Letters Springer Journals

Heterogeneous integration by adhesive bonding

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Copyright © 2013 by Esashi and Tanaka; licensee Springer.
Subject
Engineering; Circuits and Systems; Electrical Engineering; Mechanical Engineering; Nanotechnology; Applied and Technical Physics
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2213-9621
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10.1186/2213-9621-1-3
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Abstract

Wafer level adhesive bonding has been applied for the fabrication of micro systems which have heterogeneous components on LSI. Films or MEMS devices formed on a carrier wafer are transferred on a LSI wafer, which makes versatile heterogeneous integration possible. Film transfer processes and device transfer processes have been developed and applied to mirror array, resonator, piezoelectric switch, IR imager, tactile sensor, electron source and so on. Selective bonding to transfer devices on one carrier wafer to multiple LSI wafers has been developed. Keywords: Integrated MEMS; Heterogeneous integration; Adhesive bonding; Wafer level transfer Introduction Various adhesive bonding methods have been devel- Integrated MEMS (micro electro mechanical systems) oped [3]. The adhesive wafer bonding can be applied as capacitive sensors and arrayed display have been not only to the wafer level heterogeneous integration produced successfully. MEMS as switches and filters but also other purposes as three-dimensional IC, fabricated on CMOS LSI are needed for future multi- wafer-level packaging or microfluidics [4]. The wafer band wireless systems, in which good mechanical level transfer using the adhesive bonding has been properties or piezoelectric materials are required for studied in KTH in Sweden [5]. The heterogeneous in- the MEMS and state of the art for the LSI. Such het- tegration processes are shown in Figure 3. These can erogeneous integration can be performed by transfer- be categorized to film transfer process (Figure 3(a) and ring MEMS devices or a film fabricated on a carrier II), (b) device transfer process (via-last) (Figure 3(b) wafer to a LSI wafer by adhesive bonding as shown in and III) and (c) device transfer process (via-first) (Fig- Figure 1. The LSI wafer is not damaged during the ure 3(c) and IV). The details and applications of these MEMS fabrication because the MEMS and the film are processes will be described below in II, III and IV. fabricated on a separated carrier wafer and the adhesive These heterogeneous integration processes can be ap- bonding can be carried out at low temperature. MEMS on plied not only to integrated MEMS but also to other LSI is encapsulated by WLP (wafer level packaging) [1] devices as integrated optical devices by bonding a and finally diced to each chips. compound semiconductor wafer for laser or LED to a The wafer level transfer process can be low cost CMOS LSI wafer. comparing chip level processes, however for different chip size of MEMS from that of LSI selective transfer Film transfer process process described in V is needed for cost-effective The process can be used to transfer a film from the car- manufacturing. rier wafer to the LSI wafer as shown in Figure 3 (a). The wafer level integration by the adhesive bonding After the adhesive bonding, the carrier wafer is removed was used in the past. Figure 2 is an example of this tech- and the remained film is used to fabricate MEMS de- nology presented in 1984 [2]. Stacked CMOS LSI was vices on the LSI wafer. The MEMS fabrication process fabricated by bonding a PMOS wafer to a NMOS wafer on the LSI wafer has to be compatible with the inte- with polyimide. grated circuit. * Correspondence: esashi@mems.mech.tohoku.ac.jp The World Premier International Research Center Advanced Institute for Materials Research (WPI-AIMR), Tohoku University, 519-1176 Aramaki-Aza-Aoba, Aoba-ku, Sendai 980-0845, Japan Full list of author information is available at the end of the article © 2013 Esashi and Tanaka; licensee Springer. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 2 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 1 Concept of MEMS on LSI by adhesive bonding and wafer level packaging. A. Monocrystalline-Si mirror array on CMOS LSI Device transfer process (via last) A high resolution SLM (spatial-light-modulator) chip with The device transfer processes have advantages that the 1 million tilting micromirrors made of monocrystalline MEMS can be fabricated independently from the LSI Si was developed [6]. The fabrication process and the wafer. This enables wide range and optimized MEMS photograph are shown in Figure 4. The mirror exhibits low structures on LSI. In the via-last process the electrical surface roughness and drift free operation comparing metal interconnections from the MEMS to the LSI are made mirror because of the creep-free mechanical properties of by metal vias after the transfer as shown in Figure 3 (b). the monocrystalline Si. C. PZT MEMS switch PZT (lead zirconate titanate) actuated MEMS switches B. CMOS-FBAR voltage controlled oscillator were fabricated on a LSI wafer as shown in Figure 6 [8]. A wide-tuning CMOS-FBAR (film bulk acoustic reson- ator) based VCO (voltage controlled oscillator) for 2.45 GHz has been developed on 0.18 μm CMOS LSI [7]. The fabrication process, the circuit and the photograph are shown in Figure 5. Thin Si layer is formed on the CMOS wafer by adhesive bonding of a flipped SOI by BCB (benzocycrobutene) and removal of handle Si layer. A Ru and an AlN is sputter deposited and patterned re- spectively. Top Al electrode is fabricated by lift-off. Sac- rificial etching is performed to remove the Si and the BCB underneath the FBAR to make an air gap. The cir- cuit is a Pierce oscillator in which electrical frequency Figure 2 Stacked CMOS LSI by bonding with polyimide [2]. tuning can be done by connecting capacitors digitally. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 3 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 3 Heterogeneous integration processes; (a) Film transfer process, (b) Device transfer process (via-last), (c) Device transfer process (via-first). Figure 4 Monocrystalline-Si mirror array on CMOS wafer [6]. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 4 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 5 CMOS-FBAR voltage controlled oscillator. The piezoelectric MEMS switch works at lower driv- Figure 7. The via last device transfer was applied for ing voltage and occupies smaller area than electro- this process. static MEMS switches. For the MEMS switch, the PZT was deposited on a Si wafer by a sol–gel E. Tactile sensor network method. In order to prevent a bending symmetrical Distributed tactile sensors (tactile sensor network) are structure made of two stacked PZT layers is formed needed on the skin of robots to ensure their safety. and then patterned into device structures. They are These enable practically applicable nursing care robots transferred to the LSI wafer using the adhesive and so on. A tactile sensor network which acquires sens- bonding. After connecting the MEMS and the LSI ing data from each tactile sensor element by autono- using electroplated vias, the polymer was removed mous data transmission (event driven) is shown in by O plasma to release the MEMS switches. The Figure 8 [10]. The tactile sensor chips are connected to PZT cantilever bended downward by 6 μm by apply- a flexible cable having common 4 wires for power, ing 10V to the lower PZT layer. The piezoelectric ground and signal lines as shown in the photograph. MEMS also enable wide range variable MEMS ca- Capacitive tactile force sensors were formed on a com- pacitors owing to their no pull-in phenomena com- munication LSI by adhesive bonding using the BCB. The paring to the electrostatic MEMS. function of the communication LSI for the event driven data transmission was confirmed. D. Infrared Imager Array of free-hanging poly Si bolometer was developed Device transfer process (via-FIRST) for CMOS-based uncooled infrared imager [9]. The The via-first device transfer process from the carrier fabrication process and the photograph are shown in wafer to the LSI wafer uses metal bumps for the Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 5 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Structure and photograph Figure 7 Infrared imager [9]. accelerometers and three-axis gyroscope at large vol- ume for consumer product [11]. The MEMS wafer is used as a package and the process (Nasiri fabrica- tion) uses Al/Ge eutectic bonding at 450°C for elec- trical interconnection and the package sealing simultaneously. F. AFM based data storage (Millipede) (b) Fabrication process Fabrication process for arrays of AFM (atomic force Figure 6 PZT MEMS switch on LSI; (a) Structure and microscope) probe on CMOS LSI is shown in Figure 9 photograph, (b) Fabrication process. [12]. This was developed for a multi probe data stor- age called Millipede. The AFM probes fabricated on a SOI wafer is transferred by polyimide bonding to a glass wafer which has PTFE (Tellon) film on it and electrical interconnection and the mechanical holding of removal of the handle Si layer. Thereafter Cu-Ni-Ti MEMS devices as shown in Figure 3(c). The metal to and adhesive polyimide are patterned on the backside metal bump bonding methods as metal compression (1. MEMS process in Figure 9). Sn-Cu bumps are bonding and solder bonding can be used. There are formed on a CMOS wafer (2. CMOS bump process some variations of the solder bonding as eutectic bond- in Figure 9). The MEMS wafer is bonded to the ing or TLP (transient liquid phase) bonding which is CMOS wafer (3. wafer-level heterogeneous integration called SLID (solid-liquid Inter-diffusion bonding) as well. process in Figure 9). The Sn melt at the bonding The via-first process does not need electrical intercon- temperature (380°C) and diffuse into the Cu. This nection after the device transfer. makes intermetallic compound of which remelting Adhesives are not mandatory for the via-first de- temperature is higher than 500°C and hence the de- vice transfer process but are used for temporary vices stand post transfer soldering. This metal bond- bonding of the devices on the carrier wafer or for an ing is called TLP or SLID. Debonding of the glass underfill (mechanical support). The via-first device waferisdonebylaser ablation throughthe glass transfer process without adhesive bonding has been wafer and finally the polyimide used for the device applied for manufacturing of combined three-axis transfer is etched out using O plasma. 2 Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 6 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Sensors on a flexible circuit, signal waveform and structure (b) Fabrication process Figure 8 Tactile sensor network; (a) Sensors on a flexible circuit, signal waveform and structure, (b) Fabrication process. G. Active matric electron emitter for massive parallel speed massively parallel direct write EB (electron electron beam exposure systems beam) exposure system [13]. A nc-Si (nanocrystalline A prototype electron emitter array integrated with an silicon) emitter used is shown in Figure 10 (a). The active-matrix driving LSI has been developed for high- nc-Si emitter consists of cascaded tunnel junction Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 7 of 10 http://www.mnsl-journal.com/content/1/1/3 Selective transfer technologies Wafer level selective transfer from one carrier wafer to multiple target wafers are needed for cost-effective inte- gration of different chip sizes [15]. One example of the technology is shown in Figure 11 [16]. MEMS devices on a glass carrier wafer are bonded to the target LSI wafer (Figure 11 (2)) and MEMS devices to be trans- ferred are debonded by laser through the glass carrier wafer (Figure 11 (3)). MEMS devices remained on the glass carrier wafer can be transferred to another target wafers (Figure 11 (4)). The selective transfer technology was applied to the SAW (surface acoustic wave) resonator on LSI as shown in Figure 12 [17]. SAW resonators are fabricated on a LiNbO wafer and the wafer is bonded to a glass carrier wafer using an adhesive and diced to make grooves (1. LiNbO SAW chip fabrication in Figure 12). The target LSI wafer is fabricated as follows. Metal (Au-Cr) pattern is made and sticky silicone bumps are also patterned on the wafer. Thereafter metal (Au-Cr) pattern is made on it (2. target silicon wafer fabrication in Figure 12). The flipped carrier wafer is bonded to the target wafer using the sticky silicone bumps. After debonding of the glass carrier wafer by laser the bump bonding is reinforced using an underfill polymer (3. integra- tion/transfer in Figure 12). The photograph of the SAW resonators transferred on a LSI wafer is showninFigure12. Conclusions Figure 9 Probe array for AFM based data storage [4,12]. The heterogeneous integration on LSI using the wafer level transfer with adhesives is reviewed. This technol- ogy enables low cost production of value added de- vices. PZT which requires higher temperature than and hence the electron emission is controlled at low 600°C for depositing a thin film can be applied on voltage (10V). A chromatic aberration is small be- LSI using this technology. Selective transfer from cause of a small energy dispersion of the emitted one wafer to multiple LSI wafers are described to electron. The structure of the active matrix emitter is cost effective production of different size MEMS showninFigure10(b) [14].The nc-Siemitter is chip from LSI chip. There are related items to this concave shaped in order to condense the electron technology as adhesives, alignment for the bonding and to collimate the electron beam using an extrac- and debonding. The adhesives can be applied by tion electrode, which is called Pierce gun. The wafer coating, stamping and film laminating. The adhesive of the nc-Si emitter is bonded to a driver LSI wafer layers can be patterned or unpatterned and can with gold bumps. 100×100 cells of the driver circuit stand relatively high temperature (400°C) as poly- are formed on a glass by adhesive bonding. The cells imide if needed. Transparent glass or self-alignment can be electrically isolated in order to apply a bias is required depending on the processes. There are voltage to the cells for electronic aberration compen- various debonding methods to remove the carrier sation. Photographs of the emitter-side and the wafer as polymer etching, sacrificial layer etching bump-side of the nc-Si emitter wafer are shown in and etching or mechanical grinding of the carrier Figure 10 (c). Resist patterning by the emitted elec- wafer. In order to remove the polymer used for the tron was successfully confirmed in preliminary wafer bonding polymer etching by ozone in acetic experiment. acid was developed [18]. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 8 of 10 http://www.mnsl-journal.com/content/1/1/3 (a) Principle and current of nc-Si emitter (b) Structure (c) Photograph of the nc-Si emitter (Pierce gun) array Figure 10 Active matrix nc-Si electron emitter; (a) Principle and current of nc-Si emitter, (b) Structure, (c) Photograph of the nc-Si emitter (Pierce gun) array. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 9 of 10 http://www.mnsl-journal.com/content/1/1/3 Figure 11 Principle of wafer level selective transfer. Figure 12 Fabrication process and photograph of SAW resonators transferred to a LSI wafer. Esashi and Tanaka Micro and Nano Systems Letters 2013, 1:3 Page 10 of 10 http://www.mnsl-journal.com/content/1/1/3 Competing interests 8. Matsuo K, Moriyama M, Esashi M, Tanaka S (2012) Low-voltage PZT-actuated The authors declare that thy have no competing interests. MEMS switch monolithically integrated with CMOS circuit. Tech Digest IEEE MEMS 2012, Paris, pp 1153–1156, 29 Jan.-2 Feb 9. Niklaus F, Kälvesten E, Stemme G (2001) Wafer-level membrane transfer Authors’ contributions bonding of polycrystalline silicon bolometers for use in infrared focal plane ME organized the research works and wrote the manuscript. ST carried out arrays. J of Micromechanics Microengineering 11:509–513 the development of the heterogeneous integration by adhesive bonding. 10. Makihata M, Tanaka S, Muroyama M, Matsuzaki S, Yamada H, Nakayama T, Both authors read and approved the final manuscript. Yamaguchi U, Mima K, Nonomura Y, Fujiyoshi M, Esashi M (2012) Integration and packaging technology of MEMS-on-CMOS capacitive tactile Authors’ information sensor for robot application using thick BCB isolation layer and Masayoshi Esashi received the B.E. degree in electronic engineering in 1971 backside-grooved electrical connection. Sensors and Actuators A 188:103–110 and the Doctor of Engineering degree in 1976 at Tohoku University. He 11. Seeger J, Lim M, Nasiri S (2010) Development of high-performance, served as a research associate from 1976 and an associate professor from high-volume consumer MEMS gyroscopes, Solid-State Sensors, Actuators, 1981 at the Department of Electronic Engineering, Tohoku University. Since and Microsystems Workshop, Hilton Head Island., Transducer Research 1990 he has been a professor and he is now in The World Premier Foundation, California, USA, pp 61–64, 6–10 June International Research Center Advanced Institute for Materials Research 12. Dospont M, Drechsler U, Yu R, Pogge HR, Vettiger P (2004) Wafer-scale (WPI-AIMR) and concurrently in Micro System Integration Center (μSIC) microdevice transfer/interconnect: its application in an AFM-based (director) in Tohoku University. He has been studying microsensors, MEMS data-storage system. IEEE J of Microelectromechanical Systems 13:895–901 (Micro Electro Mechanical Systems) and integrated microsystems. 13. Ikegami N, Yoshida T, Kojima A, Ohyi H, Koshida N, Esashi M (2012) Shuji Tanaka received B.E., M.E. and Dr.E. degrees all in mechanical Active-matrix nanocrystalline Si electron emitter array for massively parallel engineering from The University of Tokyo in 1994, 1996 and 1999, direct-write electron-beam system: first results of the performance respectively. From 1996 to 1999, he was Research Fellow of the Japan evaluation. J Micro/Nanolith. MEMS MOEMS. 11: 031406(9pp) Society for the Promotion of Science. He was Research Associate at 14. Nishino H, Yoshida S, Tanaka S, Esashi M, Kojima A, Ikegami N, Koshida N Department of Mechatronics and Precision Engineering, Tohoku University (2013) Primary study of fabrication process of LSI-integrated Pierce-type from 1999 to 2001, Assistant Professor from 2001 to 2003, and Associate surface-electron-emitter array for massive parallel lithography. H25 Professor at Department of Nanomechanics from 2003 to 2013. He is Convention of IEEJ, Nagoya, 3-127, 20 March (in Japanese) currently Professor at Department of Bioengineering and Robotics. He was 15. Guerre R, Drechsler U, Jubin D, Despont M (2008) Selective transfer also Fellow of Center for Research and Development Strategy, Japan Science technology for microdevice distribution. IEEE J of Microelectromechanical and Technology Agency from 2004 to 2006, and is currently Selected Fellow. Systems 17:157–165 He was awarded The Young Scientists’ Prize, The Commendation for Science 16. Tanaka S, Yoshida M, Hirano H, Somekawa T, Fujita M, Esashi M (2013) and Technology by the Minister of Education, Culture, Sports, Science and Wafer-to-wafer selective flip-chip transfer by sticky silicone bonding and Technology in 2009 etc. His research interests include RF MEMS, MEMS-LSI laser debonding for rapid and easy integration test. Technical Digest IEEE integration and Power MEMS. MEMS 2013, Taipei, pp 271–274, 20–24 Jan 17. Tanaka S, Yoshida M, Hirano H, Esashi M (2012) Lithium niobate SAW device Acknowledgment hetero-transferred onto silicon integrated circuit using elastic and sticky This study was supported by Special Coordination Funds for Promoting bumps, 2012 IEEE International Ultrasonics Symposium., Dresden, Germany, Science and Technology, Formation of Innovation Center for Fusion of pp 1047–1050, 7–10 October Advanced Technologies and Funding Program for World-Leading Innovative 18. Yoshida S, Yanagida H, Esashi M, Tanaka S (2013) Simple removal R&D on Science and Technology. technology of chemically stable polymer in MEMS using ozone solution. J Microelectromechanical Systems 22:87–93 Author details The World Premier International Research Center Advanced Institute for doi:10.1186/2213-9621-1-3 Materials Research (WPI-AIMR), Tohoku University, 519-1176 Cite this article as: Esashi and Tanaka: Heterogeneous integration by Aramaki-Aza-Aoba, Aoba-ku, Sendai 980-0845, Japan. Department of adhesive bonding. Micro and Nano Systems Letters 2013 1:3. Bioengineering and Robotics, Tohoku University, 6-6-01 Aza Aoba, Aramaki Aobaku, Sendai 980-8579, Japan. Received: 3 March 2013 Accepted: 2 July 2013 Published: 6 August 2013 References 1. Esashi M (2008) Wafer level packaging of MEMS. J of Micromechanics and Microengineering 18(13pp):073001 2. Yamamoto M, Hayama H, Enomoto T (1984) Promissing new fabrication process developed for stacked LSI’s. Proc. The IEEE Intnal. Electron Devices Meeting, San Francisco, pp 816–819, 9–12 Dec 3. Niklaus F, Stemme G, Lu J-Q, Gutmann RL (2006) Adhesive wafer bonding. J of Applied Physics, 99:031101(28pp) 4. Lapisa M, Stemme G, Niklaus F (2011) Wafer-level heterogeneous Submit your manuscript to a integration for MOEMS, MEMS, and NEMS. IEEE J of Selected Topics in journal and benefi t from: Quqntum Electronics 17:629–644 5. Niklaus F, Enoksson P, Griss P, Kälvesten E, Stemme G (2001) 7 Convenient online submission Low-temperature wafer-level transfer bonding. IEEE J of 7 Rigorous peer review Microelectromechanical Systems 10:525–531 6. Zimmer F, Lapisa M, Bakke T, Bring M, Stemme G (2011) One-megapixel 7 Immediate publication on acceptance monocrystalline-silicon micromirror array on CMOS driving electronics 7 Open access: articles freely available online manufactured with very large-scale heterogeneous integration. IEEE J of 7 High visibility within the fi eld Microelectromechanical Systems 20:564–572 7 Retaining the copyright to your article 7. Kochhar A, Matsumura T, Zhang G, Pokharel R, Hashimoto K, Esashi M, Tanaka S (2012) Monolithic fabrication of film bulk acoustic resonators above integrated circuit by adhesive-bonding-based film transfer. 2012 IEEE Submit your next manuscript at 7 springeropen.com Ultrasonics Symposium, Dresden, pp 5E–3, 7–10 Oct

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