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Compiling communicating processes into delay-insensitive VLSI circuits

Compiling communicating processes into delay-insensitive VLSI circuits A method is described for compiling computations described as a set of communicating processes into VLSI circuits. The circuits obtained are delay-insensitive, i.e., their correct operation is independent of any assumption on delays in operators and wires, except that the delays are finite. They are also correct by construction since they are derived by a series of semantics-preserving transformation. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Distributed Computing Springer Journals

Compiling communicating processes into delay-insensitive VLSI circuits

Distributed Computing , Volume 1 (4) – Apr 24, 2005

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References (14)

Publisher
Springer Journals
Copyright
Copyright © 1986 by Springer-Verlag
Subject
Computer Science; Computer Communication Networks; Computer Hardware; Computer Systems Organization and Communication Networks; Software Engineering/Programming and Operating Systems; Theory of Computation
ISSN
0178-2770
eISSN
1432-0452
DOI
10.1007/BF01660034
Publisher site
See Article on Publisher Site

Abstract

A method is described for compiling computations described as a set of communicating processes into VLSI circuits. The circuits obtained are delay-insensitive, i.e., their correct operation is independent of any assumption on delays in operators and wires, except that the delays are finite. They are also correct by construction since they are derived by a series of semantics-preserving transformation.

Journal

Distributed ComputingSpringer Journals

Published: Apr 24, 2005

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