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A new five-level inverter with reduced leakage current for photovoltaic system applications

A new five-level inverter with reduced leakage current for photovoltaic system applications A general growth is being seen in the use of renewable energy resources, and photovoltaic cells are becoming increasingly popular for converting green renewable solar energy into electricity. Since the voltage produced by pho- tovoltaic cells is DC, an inverter is required to connect them to the grid with or without transformers. Transformerless inverters are often used for their low cost and low power loss, and light weight. However, these inverters suffer from leakage current in the system, a challenge that needs to be addressed. In this paper, a topology with two alternative connection models is presented to stabilize the common mode voltage and reduce the leakage current. The output voltage characteristic of the proposed inverter is five-level, which reduces the harmonic distortion in the output cur - rent compared to the two- and three-level inverters. The operation modes and output of the proposed topology are described and analyzed. The structures of the proposed inverter are simulated in MATLAB/Simulink and are compared with some well-known structures. Results show that the proposed structure with both connection models effectively reduces leakage current and improves grid current THD. Keywords: Grid-connected inverters, Multilevel inverters, Common mode voltage, Leakage current 1 Introduction efficiency and lower cost and weight when compared to Solar energy is one of the fastest growing sources of systems with a transformer [4–6]. However, the problem energy. There have been significant growth trends in with the transformerless inverters is the galvanic con- both developing and using photovoltaic (PV) systems for nection of the solar panels to the ground. This can cause harnessing green energy from the sun over the last few leakage current [7]. Despite the generally acceptable effi - decades. Unlike fossil fuels, renewable sources of energy ciency of new inverters, issues such as grounding cells such as solar do not pollute the environment during their are still required to be addressed as they are essential in production and consumption [1]. reducing leakage current. In transformerless inverters, In PV systems, voltage source inverters installed the ground of the cells is not isolated from the ground between the PV cells and the grid are required to con- of the grid and thus a parasitic capacitor exists between nect the outputs to the electrical grid [2, 3]. These the cells and the ground. The presence of this capacitor inverters can be connected to the grid with or without a introduces a leakage current in the system. This can flow transformer. through a human body and pose serious risks if exceed- In recent years, grid-connected transformerless ing a specific value. Also, the leakage current can cause inverters have been widely used because of their higher efficiency reduction, harmonic injection, and increased total harmonic distortion (THD) in the grid current [8]. Figure  1 shows an overview of the PV system, including *Correspondence: sarvi@eng.ikiu.ac.ir the inverter, output inductor and grid. Department of Electrical Engineering, Imam Khomeini International University, Qazvin, Iran © The Author(s) 2022. Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http:// creat iveco mmons. org/ licen ses/ by/4. 0/. Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 2 of 13 resulting in reduced leakage current. In another study, a HERIC-based cascade structure is introduced in [20] with a 9-level inverter connecting several PV cells. This topology, in addition to being multilevel, is able to reduce leakage current by separating the grid from PV cells in freewheeling mode. However, the large numbers of switches used in this structure increase the costs. Also, the additional switches in the current path dur- ing operation increase the conduction losses. In [21], a Fig. 1 Grid-connected photovoltaic system 5-level inverter is proposed consisting of six switches, two capacitors, and one diode. Only one inductor is used in the output of this inverter while its switch- Many topologies have been proposed in the literature ing is controlled using Space Vector (SV) modulation. to reduce leakage current. The most prominent topolo - Furthermore, a transformerless five-level inverter is gies are the full-bridge structure with bipolar switch- designed in [22] with a grid-tied single-phase PV sys- ing method, H5 structure [9], H6 [10, 11], and HERIC tem to reduce leakage current. The neutral of the grid [12] etc. A full-bridge structure with bipolar switching links to a common node in which the negative and method has a fixed common mode voltage and there - positive terminals of the DC-link are connected via fore results in very low leakage current. However, parasitic capacitors to eliminate the leakage current. In because of the two-level output voltage, large output this structure, eight switches and six diodes are used. filters are required and this increases losses. The advan - This increases losses, while it also requires a high DC tages of a full-bridge inverter with a unipolar switching voltage level at the input. Another new structure of a method include excellent differential characteristic, low single-phase transformerless grid connected multilevel inductance current ripple, and higher efficiency. How - inverter is presented in [23] based on a switched-capac- ever, the drawbacks are the unsuitable common mode itor structure. In this structure, the series–parallel characteristics and very high leakage current [13]. switching conversion of the integrated switched-capac- Another approach is to disconnect the AC side from itor module is employed in a packed unit. In [24] a new the DC side in the freewheeling modes. The structure topology of the switched-capacitor multilevel inverter proposed in [14] uses a connection between the nega- (SCMLI) is proposed for PV systems, one which can tive terminal of the solar cell and the neutral point of eliminate the leakage current. Nevertheless, this struc- the grid to reduce the leakage current. The input volt - ture uses more capacitors than similar structures and age of this structure is the same as that of the full- is less efficient than many other competing structures. bridge structure, though in spite of ease of operation, The transformerless PV inverter proposed in [25] uses this structure requires more devices. Also, in this a cascaded 5-level H-bridge (CHB), which can also be structure, one of the output inductors is taken out developed into higher levels. However, leakage current and only one inductor is used. For this reason, H5, circulation between PV panels in each 5-level block is H6, and HERIC structures were designed based on the a disadvantage. Finally, a single-phase three-level split- full-bridge structure and unipolar modulation. In this inductor neutral point clamped inverter is developed in type of inverter, the weight and cost of the filters are [26] for transformerless PV application. However, the higher because the cores of the filter inductors must be inverter also requires a high DC voltage at the input. separated. This paper presents a high-efficiency 5-level inverter Many structures have been developed based on these with two structures capable of reducing leakage current. topologies. For instance, a group of inverters based on These structures reduce common-mode voltage oscilla - the HERIC topology are designed by connecting the tion and leakage current by connecting the inverter out- middle point of the two capacitors on the input side to puts to the midpoint of the DC bus in the freewheeling the inverter output. This allows them to keep the com - mode. In addition, the structures are designed so that the mon mode voltage constant in the freewheeling mode inverter output voltage is five-level leading to improved that further reduces leakage current [15–18]. In [19], a quality in the output current and reduced total harmonic structure with six switches and two diodes is proposed, distortion in the inverter output. The performance of the in which two additional switches are placed between proposed topology is evaluated through comparisons the legs of the full-bridge structure. The inverter output with the HERIC topology [15–18] and the MOSFET neu- is a short circuit in the freewheeling mode which pre- tral-point-clamped (M-NPC) structure presented in [16]. vents large fluctuations in the common mode voltage The study shows the advantages of the proposed inverter Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 3 of 13 freewheeling is when the inverter output is short cir- cuited. Figure  3 shows one of the most common AC separation structures, namely, the HERIC inverter. This topology is usually used to test leakage current behavior. According to the definitions in [28], the equivalent common-mode voltage V , differential and common ECM mode voltages as well as leakage currents are calculated as: V L − L DM 1 2 V = V + ECM CM (1) 2 L + L 1 2 V + V AN BN V = (2) CM V = V − V (3) DM AN BN dV CM I = C (4) Leakage PV dt where V and V are the respective potential differ - AN BN Fig. 2 Common-mode model: a detailed, b simplified ences between points A and B relative to the negative ter- minal of the PV array (point N in Fig.  3). If the values of L and L are equal, the second part of (1) is eliminated. 1 2 in terms of common mode voltage stabilization, leakage As noted from (4), the leakage current depends on the current reduction, multilevel output in the inverter, and changes in the common mode voltage. In order to control improved THD, as well as a higher efficiency than other the common mode voltage in the freewheeling mode in topologies proposed in the literature. the HERIC inverter, two switches (S5 and S6) are placed After reviewing the literature extensively in Sect.  1, on the AC side. This is achieved by turning on S5 and the the concept of leakage current in a HERIC inverter is diode parallel to S6 in the positive half cycle, and by turn- described in Sect. 2. The proposed topology is presented ing on S6 and the diode parallel to S5 in the negative half and described with two connection models in Sect.  3. cycle. The other switches are OFF in the freewheeling Section  4 presents the simulation results, and Sect.  5 mode. concludes the paper. In the present study, in addition to the HERIC struc- ture, other proposed structures [16, 23, 25] are con- 2 Leakage current in inverters sidered for comparison. The structure of the MOSFET In transformerless inverters, leakage current flows neutral-point-clamped (M-NPC) inverter [16] is through the parasitic capacitor (between the ground and the PV panel (C )), the output inductors (L, L ), PV 1 2 and the ground impedance (Z ) as shown in Fig. 2. The detailed model of the corresponding common-mode noise is shown in Fig.  2a, while the simplified model is shown in Fig. 2b irrespective of Z . The value of the parasitic capacitor depends on many factors such as the surface of the solar array, weather conditions, the distance of the plate from the ground, humidity, and dust [27], and is often considered to be between 50 and 150  nF/kW [8]. A full-bridge inverter has a relatively high leakage current with unipolar switching. There- fore, the AC separation method is recommended to avoid increasing the common mode voltage by creat- Fig. 3 The HERIC topology [12] ing a freewheeling path between AC and DC. Here, Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 4 of 13 The structure of [23] is shown in Fig.  4b, which consists of six switches, two diodes and capacitors. It has six oper- ation modes that generate a five-level output voltage. The structure of [25] provides a multilevel cascaded H-bridge inverter, which can also be generalized to higher levels. Its five-level structure consisting of eight switches is shown in Fig. 4c. 3 The proposed topology Here, a new five-level topology which contains 11 switches is proposed. This has the ability to reduce leak - age current. This topology is presented in two structures. The main difference between them is the way the invert - ers are connected to the PV panels. The different con - nections provide choices in connecting the inverter to the solar panels based on the existing panels, with each connection option offering unique features. In the first structure, the THD of the output current is lower than the second, while the second structure has lower leakage current of each panel (not the grid leakage current) than the first structure. This increases the safety of using the panels. 3.1 The topology with the first structure The first structure is illustrated in Fig.  5. The voltage level of PV1 is twice that of PV2 ( V = 2V ). Using PV1 PV2 capacitors parallel to the panels (C ), a voltage division dc is performed and different voltage levels relative to point N at the input side are obtained. Among different PWM methods, SPWM is mostly used for multilevel inverters, because of simple implementation with good perfor- mance. In this paper, a type of level-shifted carrier PWM (LSC-PWM) method is selected which includes two high frequency carriers that have the same phase, amplitude and frequency. According to this method, the amplitude of the carriers is 1/(Number of carriers), which in this paper is equal to 0.5 with 2 carriers. The switching of this method is based on the comparison of two high frequency triangular waves with a grid frequency modulation wave as shown Fig. 4 Some other topologies: a the structure of [16], b the structure in Figs.  6 and 7. The frequency of the carrier waves is of [23], c the structure of [25] 16 kHz. The control rules are defined as follows: If (V ) > V then S1, S4 are ON control tri1 (5) shown in Fig.  4a. This consists of seven switches and four diodes. It also has two operations in freewheeling mode. In the positive freewheeling cycle, D1, D2, S2, If (−V ) > V then S2, S3 are ON control tri1 (6) and S5 are ON, while D1, D3, D4, and S7 are ON in the negative freewheeling cycle. This structure is not sym - If (|V |) < V then S5, S6, S7 are ON control tri1 (7) metrical in the positive and negative cycles of the con- duction modes since in the positive cycle, S1, S2, S5, If (|V |) > V then S8, S11 are ON (8) control tri2 and S6 are ON, whereas in the negative cycle only S3 and S4 are ON. Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 5 of 13 Fig. 5 The first structure of the proposed topology Fig. 6 Synthesizing the gate commands based on the proposed switching algorithm diagram with switch status demonstrating different oper - If (|V |) < V then S9, S10 are ON control tri2 (9) ational modes is shown in Fig. 8. The proposed inverter is comprised of five operation Mode 1: S1, S4, S9, and S10 are ON while the other modes, two of which are in the positive cycle (Modes 1 switches are OFF. In this case, the positive and nega- and 2), two are in the negative cycle (Modes 3 and 4), and tive terminals of PV2 are connected to points A and B, one is in the freewheeling cycle (Mode 5). In the posi- respectively. Figure 8a shows the circuit diagram with the tive or negative cycle, four switches are ON, while in the corresponding switch status. Differential (output voltage) freewheeling mode, three switches are ON. The circuit and common mode voltages are calculated as: Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 6 of 13 V = V − V =− V (17) AB AN BN PV 1 V + V 1 AN BN V = = V (18) CM PV 1 2 2 Mode 4: S2, S3, S8, and S11 are ON while the other switches are OFF. In this mode, the positive and nega- tive terminals of PV1 are connected to points B and A, respectively (as shown in Fig.  8d), and the voltage are defined as: V = 0, V = V AN BN PV 1 (19) V = V − V = −V AB AN BN PV 1 (20) V + V 1 AN BN V = = V (21) CM PV 1 2 2 Mode 5: This mode is the freewheeling cycle, so S5, S6, and S7 are ON, while the midpoint of the PV panels is Fig. 7 Switching pattern connected to both points A and B (shown in Fig.  8e). In this case, the voltages are determined as: V = V = V = V (22) AN BN PV 1 PV 2 3 1 V = V , V = V (10) AN PV 1 BN PV 1 4 4 V = 0 AB (23) V = V − V = V (11) AB AN BN PV 1 V + V 1 AN BN V = = V (24) CM PV 1 2 2 V + V 1 AN BN V = = V (12) The voltages in points A and B relative to the reference CM PV 1 2 2 point (N), and the voltages in the common and differen - tial modes in each of the operation modes are given in Mode 2: S1, S4, S8, and S11 are ON while the other Table 1. As observed in all the equations above, the com- switches are OFF. In this case, the positive and negative mon mode voltages in all the operating modes are con- terminals of PV1 are connected to points A and B, respec- stant and equal to V /2. In this structure, the leakage tively (shown in Fig.  8b). Differential (output voltage) and PV1 current is reduced by stabilizing the common mode volt- common mode voltages are calculated as: age in all modes to V /2. There are five levels of output PV1 V = V , V = 0 1 1 AN PV 1 BN (13) voltage, including − V , − V , 0, + V , + V , PV1 PV1 PV1 PV1 2 2 which are more than other structures such as HERIC. V = V − V = V AB AN BN PV 1 (14) V + V 1 AN BN V = = V (15) CM PV 1 Table 1 Differential (output) and common mode voltage values 2 2 in different operation modes for the first structure Mode 3: S2, S3, S9, and S10 are ON while the other Mode V V V V AN BN DM CM switches are OFF. In this mode, the positive and negative 3 1 1 1 V V V V terminals of PV2 are connected to points B and A, respec- PV1 PV1 PV1 PV1 4 4 2 2 2 V 0 V tively (shown in Fig. 8c), and the voltages are calculated as: PV1 PV1 V 2 PV1 1 3 1 1 V V − V V PV1 PV1 PV1 PV1 4 4 2 2 1 3 V = V , V = V (16) 4 0 V − V AN PV 1 BN PV 1 V PV1 PV1 PV1 4 4 1 1 1 5 0 V V V 2 PV1 2 PV1 2 PV1 Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 7 of 13 Fig. 8 Circuit diagram with switch status demonstration for the first structure of the proposed topology in different operation modes: a Mode 1, b Mode 2, c Mode 3, d Mode 4, and e Mode 5 Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 8 of 13 Table 2 Differential (output) and common mode voltage values in different operation modes for the first structure Mode V V V AN BN DM CM 1 3V V 2V 2V PV PV PV PV 2 4V 0 4V 2V PV PV PV 3 V 3V − 2V 2V PV PV PV PV 4 0 4V − 4V 2V PV PV PV 5 2V 2V 0 2V PV PV PV Fig. 9 The second structure of the proposed topology Table 3 Values of the simulation parameters 3.2 The second structure with a different connection Parameter Value in the DC‑Link Input voltage 400 V In the first structure, two PV panels are used on the Grid voltage 220 V AC/50 Hz input side. In addition to the aforementioned configu - Pout 2 kW ration, the connections can be designed based on some Switching frequency 16 kHz other methods. The second structure uses four PV pan - Cdc 0.47 mF els with equal voltage level. By series connection of these L, L 2 mH 1 2 panels, different levels of voltage can be achieved, as Cpv 100 nF/1 kW shown in Fig. 9. Rg 3 Ω The switching pattern of this structure is the same as PF 1 the previous structure (shown in Figs.  6 and 7). Also, this structure has five operation modes similar to the previous one. The circuit diagram with switch status for this topology in different operation modes is pre- 220 V and 50 Hz, respectively. The output filter inductors sented in Fig.  10, while V, V , differential voltage, AN BN are 2  mH, and C is 0.47  mF. The amount of radiation dc and common mode voltage are summarized in Table 2. and temperature for these simulations are 1000  W/m From Table  2, the common mode voltages in all the and 25 ℃, respectively, while the value of parasitic capac- operating modes are constant and equal to 2V . PV itors (C ) is 100  nF/kW. As several PV panels with dif- PV Also, the output voltages (differential) in different ferent power are used in the proposed topology, the value operational modes have five levels: − 4V , − 2V , 0, PV PV of the leakage capacitance for each cell is proportional + 2V , and + 4V . PV PV to the cell power (according to the ratio of 100  nF/kW). The simulations are carried out at 2 kW with unit power 4 Results and discussions factor and the switching frequency is 16 kHz. The values To evaluate the performance of the proposed topology, of the simulation parameters are given in Table  3. In the simulations are performed in MATLAB/Simulink. Data simulations, the transient state is not considered and only is obtained for the proposed topology (with two differ - the steady state of the systems is presented. ent structures), the HERIC topology, the M-NPC topol- From the simulation, the behaviors of the two proposed ogy in [16], the topology in [23] and the CHB topology in structures are similar. Figure  11 shows the voltage wave- [25]. The simulation results from MATLAB/Simulink are forms of the two structures. As can be seen, the voltages further validated by PSIM software with similar results in both structures are the same, while the main differ - obtained. In the simulations, for HERIC and M-NPC, a ences between the two proposed structures are the leak- solar panel is considered with a voltage level of 400  V. age current and total harmonic distortion, as previously For studies of the topologies in [23] and [25], one and discussed. Thus the first structure is used to compare the two solar panels are considered, respectively, with a volt- proposed topology with conventional topologies. age level of 200 V. For the first structure of the proposed Figure  12 shows V and V in HERIC, M-NPC, AN BN topology, the voltage levels of PV1 and PV2 are 400  V and the proposed topology, where the five-level voltage and 200  V, respectively, while the voltage level of each in the proposed topology is evident. Figure  13 demon- panel in the second structure of the proposed topology strates the output voltage and the common mode voltage is 100  V. The grid voltage and frequency in all cases are of the inverter in each topology, demonstrating that the Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 9 of 13 Fig. 10 Circuit diagram with switch status demonstration for the second structure of the proposed topology in different operation modes; a Mode 1, b Mode 2, c Mode 3, d Mode 4, e Mode 5 common voltage variations in M-NPC and the proposed and 13.82  mA for M-NPC and the proposed topology, topology are much lower than that of the HERIC. respectively. Figure  14 shows the grid and leakage currents in each For a better comparison of M-NPC with the proposed topology. Unlike HERIC, in the proposed topology sev- topology, the leakage current waveforms are shown in eral PV panels are used at the input side, and there- Fig.  15 with magnification. As it clearly illustrates, the fore, the leakage current is divided between the PV leakage current in the proposed topology is better than panels. Accordingly, for a more accurate comparison, that of M-NPC. grid leakage currents in different topologies are com - By using FFT analysis, THD is obtained for the out- pared. As seen from Fig.  14, M-NPC and the proposed put current of each structure. From this, THD values for topology perform better at reducing and improving HERIC, M-NPC, and the proposed structure with the leakage current than HERIC. The RMS of the leakage first and second connections are 8.6%, 8.85%, 3.64% and current is 34.8  mA in HERIC compared with 14.73  mA 4.48%, respectively. Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 10 of 13 Fig. 12 V and V in the studied topology; a HERIC, b M-NPC, c the AN BN proposed topology We should mention that the findings presented in Table  4 are obtained at 1000  W/m and 25 ℃. In addi- Fig. 11 V, V, V and V in the proposed topology; a the first AN BN DM CM tion to these values, variations in the radiation and structure, b the second structure temperature and their effects on leakage current and THD are investigated in each topology and the results are illustrated in Tables  6 and 7. In Table  6, it can be seen that variations in the temperature and radiation Figure  16 shows the variations in the efficiency of change the leakage current in HERIC and M-NPC HERIC, inverters in [16] and [23], and the proposed topologies. However, the leakage current in the pro- structure for different loads. The overall performance of posed topology is not dependent on the environmental the topologies under investigation is presented in Table 4. changes and has a desirable low value under different As mentioned earlier, the parasitic capacitor (C ) PV environmental conditions. Also, under varying temper- capacitance value is often between 50 and 150  nF/kW. atures and radiations as shown in Table  7, THD values In the main simulations, 100  nF/kW is considered. To of the previous two topologies are very high and unde- further investigate the effect of the capacitance value on sirable while it is favorably low and acceptable in the the leakage current, simulations with values of 50 and proposed structure. 150 nF/kW are performed on the proposed topology and the results are given in Table  5. These results show that upon increasing the parasitic capacitance, leakage cur- rent increases. Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 11 of 13 Fig. 13 V and V in the studied topologies; a HERIC, b M-NPC, c Fig. 14 i and i in the studied topologies; a HERIC, b M-NPC, c DM CM grid leakage the proposed topology the proposed topology 5 Conclusion In this paper, a new inverter has been presented to reduce structure and switching, the most notable advantages of leakage current. HERIC and M-NPC inverters and their the proposed inverter are: effects on reducing leakage current are discussed and compared with the proposed topology. In addition to • Common mode voltage stabilization and leakage reducing leakage current, the output voltage of the pro- current reduction posed topology has five levels. This is more efficient than • Multilevel output with improved THD HERIC in reducing the output current THD. Although • Higher efficiency than the other competing topolo - the proposed topology is slightly complex in terms of gies Table 4 Comparison of the performance of the topologies under investigation Topology HERIC M‑NPC [16] Proposed in [23] Proposed in [25] The first proposed The second structure proposed structure V (V ) Floating (∼ 200) Constant (200) – – Constant (200) Constant (200) CM I (mA) 34.85 14.73 14.65 20.75 13.82 13.82 leakage THD % 8.6 8.85 7.75 5.83 3.64 4.48 Efficiency 99.7 98.22 98.6 91 99.5 99.7 Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 12 of 13 5001000 1500 2000 2500 Load (W) Proposed HERIC [16] [23] Fig. 16 Efficiency changes in terms of different loads Abbreviations THD: Total harmonic distortion; PV: Photovoltaic; HERIC: Highly efficient and reliable inverter concept; SV: Space vector; SCMLI: Switched-capacitor multilevel inverter; CHB: Cascaded H-bridge; M-NPC: MOSFET neutral- point-clamped; C : Parasitic capacitor; L, L : Output inductors; Z : Ground PV 1 2 G Fig. 15 The magnified leakage current; a M-NPC, b the proposed impedance; R : Ground resistance; C : Capacitor parallel to the DC bus; G dc topology V : Equivalent common-mode voltage; V : Common mode voltage; V : ECM CM DM Differential voltage; V : Photovoltaic panel voltage; I : Leakage current; PV Leakage I : Grid current; P : Output power; PF: Power factor; LSC-PWM: Level-shifted Grid Out carrier PWM; FFT: Fast Fourier transform. Table 5 Leakage current for different capacitors in the proposed Acknowledgements topology The authors would like to acknowledge the Imam Khomeini International University, Qazvin, Iran. Parasitic capacitors (nF/kW) Leakage current (mA) Author contributions 50 6.91 The paper was a collaborative effort among the authors. All authors read and 100 13.82 approved the final manuscript. 150 20.74 Funding Not applicable. Availability of data and materials All data used or analyzed during this study are included in the published Table 6 The impact of radiation and temperature changes on article. the leakage current (mA) Radiation Temperature HERIC M‑NPC Proposed Declarations (W/m ) (°C) (structure1) Competing interests 500 25 34.1 16.2 13.82 The authors declare that they have no competing interests. 750 25 34.12 15.9 13.82 Received: 7 January 2022 Accepted: 14 April 2022 1000 10 63 14.73 13.82 1000 15 60.1 14.7 13.82 1000 20 45.7 14.76 13.82 References 1. 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A new five-level inverter with reduced leakage current for photovoltaic system applications

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Springer Journals
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Copyright © The Author(s) 2022
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2367-2617
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2367-0983
DOI
10.1186/s41601-022-00240-3
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Abstract

A general growth is being seen in the use of renewable energy resources, and photovoltaic cells are becoming increasingly popular for converting green renewable solar energy into electricity. Since the voltage produced by pho- tovoltaic cells is DC, an inverter is required to connect them to the grid with or without transformers. Transformerless inverters are often used for their low cost and low power loss, and light weight. However, these inverters suffer from leakage current in the system, a challenge that needs to be addressed. In this paper, a topology with two alternative connection models is presented to stabilize the common mode voltage and reduce the leakage current. The output voltage characteristic of the proposed inverter is five-level, which reduces the harmonic distortion in the output cur - rent compared to the two- and three-level inverters. The operation modes and output of the proposed topology are described and analyzed. The structures of the proposed inverter are simulated in MATLAB/Simulink and are compared with some well-known structures. Results show that the proposed structure with both connection models effectively reduces leakage current and improves grid current THD. Keywords: Grid-connected inverters, Multilevel inverters, Common mode voltage, Leakage current 1 Introduction efficiency and lower cost and weight when compared to Solar energy is one of the fastest growing sources of systems with a transformer [4–6]. However, the problem energy. There have been significant growth trends in with the transformerless inverters is the galvanic con- both developing and using photovoltaic (PV) systems for nection of the solar panels to the ground. This can cause harnessing green energy from the sun over the last few leakage current [7]. Despite the generally acceptable effi - decades. Unlike fossil fuels, renewable sources of energy ciency of new inverters, issues such as grounding cells such as solar do not pollute the environment during their are still required to be addressed as they are essential in production and consumption [1]. reducing leakage current. In transformerless inverters, In PV systems, voltage source inverters installed the ground of the cells is not isolated from the ground between the PV cells and the grid are required to con- of the grid and thus a parasitic capacitor exists between nect the outputs to the electrical grid [2, 3]. These the cells and the ground. The presence of this capacitor inverters can be connected to the grid with or without a introduces a leakage current in the system. This can flow transformer. through a human body and pose serious risks if exceed- In recent years, grid-connected transformerless ing a specific value. Also, the leakage current can cause inverters have been widely used because of their higher efficiency reduction, harmonic injection, and increased total harmonic distortion (THD) in the grid current [8]. Figure  1 shows an overview of the PV system, including *Correspondence: sarvi@eng.ikiu.ac.ir the inverter, output inductor and grid. Department of Electrical Engineering, Imam Khomeini International University, Qazvin, Iran © The Author(s) 2022. Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http:// creat iveco mmons. org/ licen ses/ by/4. 0/. Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 2 of 13 resulting in reduced leakage current. In another study, a HERIC-based cascade structure is introduced in [20] with a 9-level inverter connecting several PV cells. This topology, in addition to being multilevel, is able to reduce leakage current by separating the grid from PV cells in freewheeling mode. However, the large numbers of switches used in this structure increase the costs. Also, the additional switches in the current path dur- ing operation increase the conduction losses. In [21], a Fig. 1 Grid-connected photovoltaic system 5-level inverter is proposed consisting of six switches, two capacitors, and one diode. Only one inductor is used in the output of this inverter while its switch- Many topologies have been proposed in the literature ing is controlled using Space Vector (SV) modulation. to reduce leakage current. The most prominent topolo - Furthermore, a transformerless five-level inverter is gies are the full-bridge structure with bipolar switch- designed in [22] with a grid-tied single-phase PV sys- ing method, H5 structure [9], H6 [10, 11], and HERIC tem to reduce leakage current. The neutral of the grid [12] etc. A full-bridge structure with bipolar switching links to a common node in which the negative and method has a fixed common mode voltage and there - positive terminals of the DC-link are connected via fore results in very low leakage current. However, parasitic capacitors to eliminate the leakage current. In because of the two-level output voltage, large output this structure, eight switches and six diodes are used. filters are required and this increases losses. The advan - This increases losses, while it also requires a high DC tages of a full-bridge inverter with a unipolar switching voltage level at the input. Another new structure of a method include excellent differential characteristic, low single-phase transformerless grid connected multilevel inductance current ripple, and higher efficiency. How - inverter is presented in [23] based on a switched-capac- ever, the drawbacks are the unsuitable common mode itor structure. In this structure, the series–parallel characteristics and very high leakage current [13]. switching conversion of the integrated switched-capac- Another approach is to disconnect the AC side from itor module is employed in a packed unit. In [24] a new the DC side in the freewheeling modes. The structure topology of the switched-capacitor multilevel inverter proposed in [14] uses a connection between the nega- (SCMLI) is proposed for PV systems, one which can tive terminal of the solar cell and the neutral point of eliminate the leakage current. Nevertheless, this struc- the grid to reduce the leakage current. The input volt - ture uses more capacitors than similar structures and age of this structure is the same as that of the full- is less efficient than many other competing structures. bridge structure, though in spite of ease of operation, The transformerless PV inverter proposed in [25] uses this structure requires more devices. Also, in this a cascaded 5-level H-bridge (CHB), which can also be structure, one of the output inductors is taken out developed into higher levels. However, leakage current and only one inductor is used. For this reason, H5, circulation between PV panels in each 5-level block is H6, and HERIC structures were designed based on the a disadvantage. Finally, a single-phase three-level split- full-bridge structure and unipolar modulation. In this inductor neutral point clamped inverter is developed in type of inverter, the weight and cost of the filters are [26] for transformerless PV application. However, the higher because the cores of the filter inductors must be inverter also requires a high DC voltage at the input. separated. This paper presents a high-efficiency 5-level inverter Many structures have been developed based on these with two structures capable of reducing leakage current. topologies. For instance, a group of inverters based on These structures reduce common-mode voltage oscilla - the HERIC topology are designed by connecting the tion and leakage current by connecting the inverter out- middle point of the two capacitors on the input side to puts to the midpoint of the DC bus in the freewheeling the inverter output. This allows them to keep the com - mode. In addition, the structures are designed so that the mon mode voltage constant in the freewheeling mode inverter output voltage is five-level leading to improved that further reduces leakage current [15–18]. In [19], a quality in the output current and reduced total harmonic structure with six switches and two diodes is proposed, distortion in the inverter output. The performance of the in which two additional switches are placed between proposed topology is evaluated through comparisons the legs of the full-bridge structure. The inverter output with the HERIC topology [15–18] and the MOSFET neu- is a short circuit in the freewheeling mode which pre- tral-point-clamped (M-NPC) structure presented in [16]. vents large fluctuations in the common mode voltage The study shows the advantages of the proposed inverter Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 3 of 13 freewheeling is when the inverter output is short cir- cuited. Figure  3 shows one of the most common AC separation structures, namely, the HERIC inverter. This topology is usually used to test leakage current behavior. According to the definitions in [28], the equivalent common-mode voltage V , differential and common ECM mode voltages as well as leakage currents are calculated as: V L − L DM 1 2 V = V + ECM CM (1) 2 L + L 1 2 V + V AN BN V = (2) CM V = V − V (3) DM AN BN dV CM I = C (4) Leakage PV dt where V and V are the respective potential differ - AN BN Fig. 2 Common-mode model: a detailed, b simplified ences between points A and B relative to the negative ter- minal of the PV array (point N in Fig.  3). If the values of L and L are equal, the second part of (1) is eliminated. 1 2 in terms of common mode voltage stabilization, leakage As noted from (4), the leakage current depends on the current reduction, multilevel output in the inverter, and changes in the common mode voltage. In order to control improved THD, as well as a higher efficiency than other the common mode voltage in the freewheeling mode in topologies proposed in the literature. the HERIC inverter, two switches (S5 and S6) are placed After reviewing the literature extensively in Sect.  1, on the AC side. This is achieved by turning on S5 and the the concept of leakage current in a HERIC inverter is diode parallel to S6 in the positive half cycle, and by turn- described in Sect. 2. The proposed topology is presented ing on S6 and the diode parallel to S5 in the negative half and described with two connection models in Sect.  3. cycle. The other switches are OFF in the freewheeling Section  4 presents the simulation results, and Sect.  5 mode. concludes the paper. In the present study, in addition to the HERIC struc- ture, other proposed structures [16, 23, 25] are con- 2 Leakage current in inverters sidered for comparison. The structure of the MOSFET In transformerless inverters, leakage current flows neutral-point-clamped (M-NPC) inverter [16] is through the parasitic capacitor (between the ground and the PV panel (C )), the output inductors (L, L ), PV 1 2 and the ground impedance (Z ) as shown in Fig. 2. The detailed model of the corresponding common-mode noise is shown in Fig.  2a, while the simplified model is shown in Fig. 2b irrespective of Z . The value of the parasitic capacitor depends on many factors such as the surface of the solar array, weather conditions, the distance of the plate from the ground, humidity, and dust [27], and is often considered to be between 50 and 150  nF/kW [8]. A full-bridge inverter has a relatively high leakage current with unipolar switching. There- fore, the AC separation method is recommended to avoid increasing the common mode voltage by creat- Fig. 3 The HERIC topology [12] ing a freewheeling path between AC and DC. Here, Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 4 of 13 The structure of [23] is shown in Fig.  4b, which consists of six switches, two diodes and capacitors. It has six oper- ation modes that generate a five-level output voltage. The structure of [25] provides a multilevel cascaded H-bridge inverter, which can also be generalized to higher levels. Its five-level structure consisting of eight switches is shown in Fig. 4c. 3 The proposed topology Here, a new five-level topology which contains 11 switches is proposed. This has the ability to reduce leak - age current. This topology is presented in two structures. The main difference between them is the way the invert - ers are connected to the PV panels. The different con - nections provide choices in connecting the inverter to the solar panels based on the existing panels, with each connection option offering unique features. In the first structure, the THD of the output current is lower than the second, while the second structure has lower leakage current of each panel (not the grid leakage current) than the first structure. This increases the safety of using the panels. 3.1 The topology with the first structure The first structure is illustrated in Fig.  5. The voltage level of PV1 is twice that of PV2 ( V = 2V ). Using PV1 PV2 capacitors parallel to the panels (C ), a voltage division dc is performed and different voltage levels relative to point N at the input side are obtained. Among different PWM methods, SPWM is mostly used for multilevel inverters, because of simple implementation with good perfor- mance. In this paper, a type of level-shifted carrier PWM (LSC-PWM) method is selected which includes two high frequency carriers that have the same phase, amplitude and frequency. According to this method, the amplitude of the carriers is 1/(Number of carriers), which in this paper is equal to 0.5 with 2 carriers. The switching of this method is based on the comparison of two high frequency triangular waves with a grid frequency modulation wave as shown Fig. 4 Some other topologies: a the structure of [16], b the structure in Figs.  6 and 7. The frequency of the carrier waves is of [23], c the structure of [25] 16 kHz. The control rules are defined as follows: If (V ) > V then S1, S4 are ON control tri1 (5) shown in Fig.  4a. This consists of seven switches and four diodes. It also has two operations in freewheeling mode. In the positive freewheeling cycle, D1, D2, S2, If (−V ) > V then S2, S3 are ON control tri1 (6) and S5 are ON, while D1, D3, D4, and S7 are ON in the negative freewheeling cycle. This structure is not sym - If (|V |) < V then S5, S6, S7 are ON control tri1 (7) metrical in the positive and negative cycles of the con- duction modes since in the positive cycle, S1, S2, S5, If (|V |) > V then S8, S11 are ON (8) control tri2 and S6 are ON, whereas in the negative cycle only S3 and S4 are ON. Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 5 of 13 Fig. 5 The first structure of the proposed topology Fig. 6 Synthesizing the gate commands based on the proposed switching algorithm diagram with switch status demonstrating different oper - If (|V |) < V then S9, S10 are ON control tri2 (9) ational modes is shown in Fig. 8. The proposed inverter is comprised of five operation Mode 1: S1, S4, S9, and S10 are ON while the other modes, two of which are in the positive cycle (Modes 1 switches are OFF. In this case, the positive and nega- and 2), two are in the negative cycle (Modes 3 and 4), and tive terminals of PV2 are connected to points A and B, one is in the freewheeling cycle (Mode 5). In the posi- respectively. Figure 8a shows the circuit diagram with the tive or negative cycle, four switches are ON, while in the corresponding switch status. Differential (output voltage) freewheeling mode, three switches are ON. The circuit and common mode voltages are calculated as: Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 6 of 13 V = V − V =− V (17) AB AN BN PV 1 V + V 1 AN BN V = = V (18) CM PV 1 2 2 Mode 4: S2, S3, S8, and S11 are ON while the other switches are OFF. In this mode, the positive and nega- tive terminals of PV1 are connected to points B and A, respectively (as shown in Fig.  8d), and the voltage are defined as: V = 0, V = V AN BN PV 1 (19) V = V − V = −V AB AN BN PV 1 (20) V + V 1 AN BN V = = V (21) CM PV 1 2 2 Mode 5: This mode is the freewheeling cycle, so S5, S6, and S7 are ON, while the midpoint of the PV panels is Fig. 7 Switching pattern connected to both points A and B (shown in Fig.  8e). In this case, the voltages are determined as: V = V = V = V (22) AN BN PV 1 PV 2 3 1 V = V , V = V (10) AN PV 1 BN PV 1 4 4 V = 0 AB (23) V = V − V = V (11) AB AN BN PV 1 V + V 1 AN BN V = = V (24) CM PV 1 2 2 V + V 1 AN BN V = = V (12) The voltages in points A and B relative to the reference CM PV 1 2 2 point (N), and the voltages in the common and differen - tial modes in each of the operation modes are given in Mode 2: S1, S4, S8, and S11 are ON while the other Table 1. As observed in all the equations above, the com- switches are OFF. In this case, the positive and negative mon mode voltages in all the operating modes are con- terminals of PV1 are connected to points A and B, respec- stant and equal to V /2. In this structure, the leakage tively (shown in Fig.  8b). Differential (output voltage) and PV1 current is reduced by stabilizing the common mode volt- common mode voltages are calculated as: age in all modes to V /2. There are five levels of output PV1 V = V , V = 0 1 1 AN PV 1 BN (13) voltage, including − V , − V , 0, + V , + V , PV1 PV1 PV1 PV1 2 2 which are more than other structures such as HERIC. V = V − V = V AB AN BN PV 1 (14) V + V 1 AN BN V = = V (15) CM PV 1 Table 1 Differential (output) and common mode voltage values 2 2 in different operation modes for the first structure Mode 3: S2, S3, S9, and S10 are ON while the other Mode V V V V AN BN DM CM switches are OFF. In this mode, the positive and negative 3 1 1 1 V V V V terminals of PV2 are connected to points B and A, respec- PV1 PV1 PV1 PV1 4 4 2 2 2 V 0 V tively (shown in Fig. 8c), and the voltages are calculated as: PV1 PV1 V 2 PV1 1 3 1 1 V V − V V PV1 PV1 PV1 PV1 4 4 2 2 1 3 V = V , V = V (16) 4 0 V − V AN PV 1 BN PV 1 V PV1 PV1 PV1 4 4 1 1 1 5 0 V V V 2 PV1 2 PV1 2 PV1 Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 7 of 13 Fig. 8 Circuit diagram with switch status demonstration for the first structure of the proposed topology in different operation modes: a Mode 1, b Mode 2, c Mode 3, d Mode 4, and e Mode 5 Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 8 of 13 Table 2 Differential (output) and common mode voltage values in different operation modes for the first structure Mode V V V AN BN DM CM 1 3V V 2V 2V PV PV PV PV 2 4V 0 4V 2V PV PV PV 3 V 3V − 2V 2V PV PV PV PV 4 0 4V − 4V 2V PV PV PV 5 2V 2V 0 2V PV PV PV Fig. 9 The second structure of the proposed topology Table 3 Values of the simulation parameters 3.2 The second structure with a different connection Parameter Value in the DC‑Link Input voltage 400 V In the first structure, two PV panels are used on the Grid voltage 220 V AC/50 Hz input side. In addition to the aforementioned configu - Pout 2 kW ration, the connections can be designed based on some Switching frequency 16 kHz other methods. The second structure uses four PV pan - Cdc 0.47 mF els with equal voltage level. By series connection of these L, L 2 mH 1 2 panels, different levels of voltage can be achieved, as Cpv 100 nF/1 kW shown in Fig. 9. Rg 3 Ω The switching pattern of this structure is the same as PF 1 the previous structure (shown in Figs.  6 and 7). Also, this structure has five operation modes similar to the previous one. The circuit diagram with switch status for this topology in different operation modes is pre- 220 V and 50 Hz, respectively. The output filter inductors sented in Fig.  10, while V, V , differential voltage, AN BN are 2  mH, and C is 0.47  mF. The amount of radiation dc and common mode voltage are summarized in Table 2. and temperature for these simulations are 1000  W/m From Table  2, the common mode voltages in all the and 25 ℃, respectively, while the value of parasitic capac- operating modes are constant and equal to 2V . PV itors (C ) is 100  nF/kW. As several PV panels with dif- PV Also, the output voltages (differential) in different ferent power are used in the proposed topology, the value operational modes have five levels: − 4V , − 2V , 0, PV PV of the leakage capacitance for each cell is proportional + 2V , and + 4V . PV PV to the cell power (according to the ratio of 100  nF/kW). The simulations are carried out at 2 kW with unit power 4 Results and discussions factor and the switching frequency is 16 kHz. The values To evaluate the performance of the proposed topology, of the simulation parameters are given in Table  3. In the simulations are performed in MATLAB/Simulink. Data simulations, the transient state is not considered and only is obtained for the proposed topology (with two differ - the steady state of the systems is presented. ent structures), the HERIC topology, the M-NPC topol- From the simulation, the behaviors of the two proposed ogy in [16], the topology in [23] and the CHB topology in structures are similar. Figure  11 shows the voltage wave- [25]. The simulation results from MATLAB/Simulink are forms of the two structures. As can be seen, the voltages further validated by PSIM software with similar results in both structures are the same, while the main differ - obtained. In the simulations, for HERIC and M-NPC, a ences between the two proposed structures are the leak- solar panel is considered with a voltage level of 400  V. age current and total harmonic distortion, as previously For studies of the topologies in [23] and [25], one and discussed. Thus the first structure is used to compare the two solar panels are considered, respectively, with a volt- proposed topology with conventional topologies. age level of 200 V. For the first structure of the proposed Figure  12 shows V and V in HERIC, M-NPC, AN BN topology, the voltage levels of PV1 and PV2 are 400  V and the proposed topology, where the five-level voltage and 200  V, respectively, while the voltage level of each in the proposed topology is evident. Figure  13 demon- panel in the second structure of the proposed topology strates the output voltage and the common mode voltage is 100  V. The grid voltage and frequency in all cases are of the inverter in each topology, demonstrating that the Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 9 of 13 Fig. 10 Circuit diagram with switch status demonstration for the second structure of the proposed topology in different operation modes; a Mode 1, b Mode 2, c Mode 3, d Mode 4, e Mode 5 common voltage variations in M-NPC and the proposed and 13.82  mA for M-NPC and the proposed topology, topology are much lower than that of the HERIC. respectively. Figure  14 shows the grid and leakage currents in each For a better comparison of M-NPC with the proposed topology. Unlike HERIC, in the proposed topology sev- topology, the leakage current waveforms are shown in eral PV panels are used at the input side, and there- Fig.  15 with magnification. As it clearly illustrates, the fore, the leakage current is divided between the PV leakage current in the proposed topology is better than panels. Accordingly, for a more accurate comparison, that of M-NPC. grid leakage currents in different topologies are com - By using FFT analysis, THD is obtained for the out- pared. As seen from Fig.  14, M-NPC and the proposed put current of each structure. From this, THD values for topology perform better at reducing and improving HERIC, M-NPC, and the proposed structure with the leakage current than HERIC. The RMS of the leakage first and second connections are 8.6%, 8.85%, 3.64% and current is 34.8  mA in HERIC compared with 14.73  mA 4.48%, respectively. Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 10 of 13 Fig. 12 V and V in the studied topology; a HERIC, b M-NPC, c the AN BN proposed topology We should mention that the findings presented in Table  4 are obtained at 1000  W/m and 25 ℃. In addi- Fig. 11 V, V, V and V in the proposed topology; a the first AN BN DM CM tion to these values, variations in the radiation and structure, b the second structure temperature and their effects on leakage current and THD are investigated in each topology and the results are illustrated in Tables  6 and 7. In Table  6, it can be seen that variations in the temperature and radiation Figure  16 shows the variations in the efficiency of change the leakage current in HERIC and M-NPC HERIC, inverters in [16] and [23], and the proposed topologies. However, the leakage current in the pro- structure for different loads. The overall performance of posed topology is not dependent on the environmental the topologies under investigation is presented in Table 4. changes and has a desirable low value under different As mentioned earlier, the parasitic capacitor (C ) PV environmental conditions. Also, under varying temper- capacitance value is often between 50 and 150  nF/kW. atures and radiations as shown in Table  7, THD values In the main simulations, 100  nF/kW is considered. To of the previous two topologies are very high and unde- further investigate the effect of the capacitance value on sirable while it is favorably low and acceptable in the the leakage current, simulations with values of 50 and proposed structure. 150 nF/kW are performed on the proposed topology and the results are given in Table  5. These results show that upon increasing the parasitic capacitance, leakage cur- rent increases. Hosseink hani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 11 of 13 Fig. 13 V and V in the studied topologies; a HERIC, b M-NPC, c Fig. 14 i and i in the studied topologies; a HERIC, b M-NPC, c DM CM grid leakage the proposed topology the proposed topology 5 Conclusion In this paper, a new inverter has been presented to reduce structure and switching, the most notable advantages of leakage current. HERIC and M-NPC inverters and their the proposed inverter are: effects on reducing leakage current are discussed and compared with the proposed topology. In addition to • Common mode voltage stabilization and leakage reducing leakage current, the output voltage of the pro- current reduction posed topology has five levels. This is more efficient than • Multilevel output with improved THD HERIC in reducing the output current THD. Although • Higher efficiency than the other competing topolo - the proposed topology is slightly complex in terms of gies Table 4 Comparison of the performance of the topologies under investigation Topology HERIC M‑NPC [16] Proposed in [23] Proposed in [25] The first proposed The second structure proposed structure V (V ) Floating (∼ 200) Constant (200) – – Constant (200) Constant (200) CM I (mA) 34.85 14.73 14.65 20.75 13.82 13.82 leakage THD % 8.6 8.85 7.75 5.83 3.64 4.48 Efficiency 99.7 98.22 98.6 91 99.5 99.7 Hosseinkhani and Sarvi Protection and Control of Modern Power Systems (2022) 7:19 Page 12 of 13 5001000 1500 2000 2500 Load (W) Proposed HERIC [16] [23] Fig. 16 Efficiency changes in terms of different loads Abbreviations THD: Total harmonic distortion; PV: Photovoltaic; HERIC: Highly efficient and reliable inverter concept; SV: Space vector; SCMLI: Switched-capacitor multilevel inverter; CHB: Cascaded H-bridge; M-NPC: MOSFET neutral- point-clamped; C : Parasitic capacitor; L, L : Output inductors; Z : Ground PV 1 2 G Fig. 15 The magnified leakage current; a M-NPC, b the proposed impedance; R : Ground resistance; C : Capacitor parallel to the DC bus; G dc topology V : Equivalent common-mode voltage; V : Common mode voltage; V : ECM CM DM Differential voltage; V : Photovoltaic panel voltage; I : Leakage current; PV Leakage I : Grid current; P : Output power; PF: Power factor; LSC-PWM: Level-shifted Grid Out carrier PWM; FFT: Fast Fourier transform. Table 5 Leakage current for different capacitors in the proposed Acknowledgements topology The authors would like to acknowledge the Imam Khomeini International University, Qazvin, Iran. Parasitic capacitors (nF/kW) Leakage current (mA) Author contributions 50 6.91 The paper was a collaborative effort among the authors. All authors read and 100 13.82 approved the final manuscript. 150 20.74 Funding Not applicable. Availability of data and materials All data used or analyzed during this study are included in the published Table 6 The impact of radiation and temperature changes on article. the leakage current (mA) Radiation Temperature HERIC M‑NPC Proposed Declarations (W/m ) (°C) (structure1) Competing interests 500 25 34.1 16.2 13.82 The authors declare that they have no competing interests. 750 25 34.12 15.9 13.82 Received: 7 January 2022 Accepted: 14 April 2022 1000 10 63 14.73 13.82 1000 15 60.1 14.7 13.82 1000 20 45.7 14.76 13.82 References 1. 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Journal

Protection and Control of Modern Power SystemsSpringer Journals

Published: Dec 1, 2022

Keywords: Grid-connected inverters; Multilevel inverters; Common mode voltage; Leakage current

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