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A Fault-Tolerant Structure for Nano-Power Communication Based on the Multidimensional Crossbar Switch Network

A Fault-Tolerant Structure for Nano-Power Communication Based on the Multidimensional Crossbar... Hindawi International Transactions on Electrical Energy Systems Volume 2022, Article ID 4783847, 8 pages https://doi.org/10.1155/2022/4783847 Research Article A Fault-Tolerant Structure for Nano-Power Communication Based on the Multidimensional Crossbar Switch Network Jun Luo and Boxun Liao Guangzhou College of Technology and Business, Guangzhou, Guangdong 510850, China Correspondence should be addressed to Jun Luo; 2020020544@stu.cdut.edu.cn Received 14 July 2022; Revised 26 July 2022; Accepted 1 August 2022; Published 24 August 2022 Academic Editor: Nagamalai Vasimalai Copyright © 2022 Jun Luo and Boxun Liao. )is is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. In order to realize fault tolerance and further reduce the transmission delay, a fault-tolerant structure design method for nano- power communication based on a multidimensional crossbar switch network is proposed. )e TSV router is designed as a double crossbar structure, namely the master crossbar (MasterCrossbar) and the slave crossbar (SlaveCrossbar). Each input port of the TSV router is divided into two subports. )e port connected to the master crossbar has no input buffer, and the port connected to the slave crossbar has an input buffer. Master crossbar is the first choice for data transmission, and slave crossbar is selected when it is busy to reduce the transmission delay of data packets and reduce power consumption. Dual crossbar switches can also realize the fault tolerance of crossbar switches. )e experimental results show that the author’s fault-tolerant scheme, without in- corporating the double crossbar switch, still has a much smaller transmission delay than the reference because the author realizes fault tolerance for defective TSVs by adding bidirectional TSVs to replace faulty TSVs. )erefore, when there is a TSV failure, the reference transmission delay increases with the number of failures, but the author’s design allows packets to be transmitted in the network without being affected; the author’s bidirectional TSV fault-tolerant design is combined with the double crossbar design. After that, the transmission delay is smaller than the original, and the maximum transmission delay is about 40% faster than the reference. )e authors’ design is superior and improves the reliability of the 3DNoC system. the middle layer, and communication modules are placed on 1. Introduction the bottom layer. Due to the huge difference in the area and 3DNoC is a multilayer wafer (die) interconnection through function of the devices in each layer, it is difficult for such a through-hole via (TSV) and uses the network structure to design to achieve the same layout of network nodes on each interconnect the interconnection of resource nodes. Com- layer; it is possible to have a network structure with n∗ n on mon 3DNoC topology structures include 3DMesh, 3DToms, a certain layer and a network structure with m∗ m (m≠n) on 3D stacked Mesh, and others, among them, and the structure the upper layer, and as a result, some routing nodes have widely studied by many scholars is 3DMeshtW. )e tradi- upward or downward channels, that is, TSVs are connected, tional 3DMesh structure is a regular 3D network structure while some nodes do not have vertical channels [2]. Such a formed by stacking regular 2DNoCs up and down, and each structure makes it difficult to use traditional 3D routing layer realizes interlayer power communication through TSV. algorithms to achieve the purpose of transmitting data At present, most of the research on 3DNoC is based on this packets. regular 3DMesh topology [1]. Today, the chip manufacturing process has entered a However, in today’s industrial design, it is usually level below 65 nanometers, the process is becoming more necessary to place modules that implement different func- and more complex, and the manufacturing difficulty is tions on different layers of a 3D chip, for example, the CPU becoming more and more difficult. )e size of TSV is only core is placed on the top layer, RAM and ROM are placed on about 10 microns, and the current TSV manufacturing 2 International Transactions on Electrical Energy Systems space is divided into 8 quadrants, and the corresponding technology is not mature enough, the manufacturing cost is high, and it is easy to cause voids, fractures, misalignment, routing strategy is determined for each elephant limit so as to avoid deadlock [9]. Yang, S. et al. proposed a fault- and so on in the manufacturing process, resulting in TSV failure. )e yield of TSVs has become one of the decisive tolerant routing algorithm based on cache reuse of faulty factors affecting the yield of the entire chip, and when the links, the algorithm adds 4 self-transmitting channels to number of TSVs reaches a certain order of magnitude, the each power communication node and adopts a trans- yield of chips will decline exponentially. )e data show that parent transmission mechanism based on cache reuse, by for a silicon chip manufactured by using 65 nm CMOS multiplexing the normal buffers and channels at both process technology, 46%–65% of the cost overhead is used in ends of the faulty link to transparently transmit the data the processing of TSV. )erefore, under the premise of packets on the faulty channel, and the probability of ensuring chip communication, the number of TSVs should using the optimal output port for the data packets is improved [10]. Wang, H. et al. proposed a virtual be as small as possible [3]. channel-free fault-tolerant routing algorithm for node failures in 3DmeshNoC, which is based on 3D defense 2. Literature Review areas. )e 3D defense area can provide the location information of the faulty body, and according to the )e fusion of 3D technology and NoC technology brings new opportunities for the development of integrated location information of the faulty body provided by the circuit technology and at the same time brings new defense area, the algorithm can find the fault location in challenges. One of them is TSV failure due to physical advance and change the forwarding port so as to achieve defects, which affects 3DNoC yield. In order to solve the fault tolerance and avoid introducing deadlock [11]. yield problem of 3D chips, TSV fault tolerance research In 3DNoC, if two sets of unidirectional TSVs connecting has gradually been reported in recent years, arousing the adjacent routers fail, data cannot be transmitted through this channel. In order to achieve fault tolerance and further attention of researchers at home and abroad. Guennoc, T. et al. first proposed a circuit model for vertical reduce transmission delay and power consumption, the author designs the TSV router in 3DNoC as a double channels and then proposed a fault-tolerant technology for TSV redundancy, which improved the yield from 66% crossbar switch structure, and each input port is divided into to 98% [4]. Xiao, Y. et al. proposed a fault-tolerant ap- two subports without input buffer (buffer) and with input proach based on multichannel, which can improve re- buffer; it is connected with the two-stage crossbar Master- liability and throughput at the same time [5]. Afterward, Crossbar and SlaveCrossbar, respectively. Compared with researchers aimed at the process differences and scales of reference, experiments show that by organically combining different chips, and many TSV fault tolerance mecha- the improved redundant TSV fault-tolerant design and the nisms are designed to meet the performance require- design of double crossbar switches, the average delay of the ments of the chip. Zhang, X. et al. proposed that when the network can be reduced, the area overhead of the buffer in the chip is reduced, the power consumption is reduced, and TSV failure rate is too high, using serial power com- munication and signal remapping, remap the commu- the system reliability is improved. nication channel to the fault-free channel, thereby ensuring the smoothness of the vertical channel which is shown in Figure 1 as a communication method based on 3. Research Methods the binary molecular communication model [6]. Some 3.1. Overview of Crossbar Fault Tolerance. In the structure domestic universities and research institutes have of the 3DNoC router, the crossbar is the core component, designed circuits including TSV fault self-detection and under the cooperative operation of the arbiter and function and fault-tolerant function and also proposed the control module, it can process data from different several redundant circuits based on chain structure, high input ports and select the corresponding output port to yield can be guaranteed when the number of TSVs is output. If the crossbar fails, it will greatly affect the small, and the number of redundant TSVs can be opti- performance of the router power. )erefore, the fault mized to the greatest extent; Gao, H. et al. proposed a tolerance of the crossbar switch needs to be considered bidirectional redundant fault-tolerant design, which [12]. enables redundant channel clusters to dynamically )ere is a fault-tolerant scheme that adds a bypass configure direction and interconnection with low latency mechanism to bypass the faulty crossbar, and in this scheme, and high throughput [7]. Zhang, Y. et al. proposed a if the crossbar fails, data are transferred through the bypass. fault-tolerant routing algorithm based on local fault Alternatively, between each input and output port on either blocks, which uses extended local reliability information side of the crossbar, an error detection module for cyclic to guide fault-tolerant routing of 3D mesh/torus net- redundancy check (CRC) is added, and if a data error is works and classifies fault-free nodes within each plane, detected, the data will be discarded or retransmitted. All which greatly improves the system’s performance. unidirectional TSVs in 3DNoC are configured as bidirec- Computing power and system performance [8]. Chak- tional TSVs, which have certain fault tolerance; however, rabarti, A. et al. proposed a deadlock-free three-di- when the unidirectional TSVs between adjacent TSV routers mensional dynamic routing algorithm, based on the all fail, fault tolerance cannot be achieved. traditional 2D NoC parity-turn model, the 3D routing International Transactions on Electrical Energy Systems 3 Molecular transport The receiver channel nanomachine Establish mathematical Sending nanomachine expressions The rate at which the sending Throughput and efficiency nanomachine sends the message of receiving information molecule and the probability molecules by receiver nanomachines of sending 1 in each slot Figure 1: A communication method based on the binary molecular communication model. In addition, the delay and power consumption the flit-level acceleration mechanism of the virtual problems faced in 2DNoC are also problems that 3DNoC channel, combined with the control module of the bi- hopes to solve. Its delay and power consumption are directional link, in order to realize the flit-level accel- mainly distributed among the link, crossbar, and input eration high-speed transmission [15]. buffer. )e power consumption of the input buffer ac- counts for 46% of the total power consumption [13]. Some researchers reduce the input buffer or remove the 3.3. TSV Router Architecture buffer, but this will reduce the performance of the net- 3.3.1. Design and Fault Tolerance of Double Crossbar. In work [14]. )e author modified the fault-tolerant design of re- order to further reduce the transmission delay of the net- work, realize the fault tolerance of the crossbar switch, and dundant bidirectional TSVs, reducing the original two subinput buffers, and at the same time, combining with the improve the performance of the whole 3DNoC system, the author designs the TSV router power in 3DNoC as double design of the double crossbar switch of the router, the TSV router in the 3DNoC architecture is designed as a double crossbar switch architecture. In the cluster-based 3DNoC architecture, which com- crossbar switch architecture, which can reduce power consumption and delay while realizing fault tolerance. monly used TSV routers without virtual channels, each TSV router has 6 input and output ports, namely east-north (EN), west-north (WN), east-south (ES), west-south (WS), up 3.2. Bidirectional TSV Fault Tolerant Architecture. )e au- (UP), and down (DW). )ese six ports are, respectively, thor has 3DNoC communication architecture, where responsible for the power communication with the four 2D every four 2D routers share a TSV router. When data routers in different directions in the same cluster and the packets require interlayer communication, the XYZ TSV routers in the upper and lower adjacent layers. In order routing algorithm is used. First, the data packet is routed to prevent out-of-order crosstalk of data packets during on the same plane to reach the cluster corresponding to transmission, the author’s data packets are only designed in the cluster where the destination node is located, and the format of a data flit. then the data packet is transmitted to the TSV router for In 3DNoC, data packet transmission must go through transmission along the Z direction through TSV. the crossbar switch, and the data packet can transmit data )e author’s bidirectional TSV fault-tolerant design smoothly only after being assigned to the crossbar switch. When there are multiple data packets requesting trans- structure is shown in Figure 2, which is perfected and modified on the basis of redundant bidirectional TSV mission, the data packets that cannot be allocated by the fault-tolerant design. )e structure design reduces the crossbar switch and cannot be transmitted in time will be buffer area and at the same time removes the package buffered in the input buffer and wait, as well as packets assembly module in the original design so that the overall cannot be transmitted until the crossbar arbiter responds design is more concise and the area cost is smaller. and assigns the crossbar. If there are many data packets Because the buffer is the component that occupies the communicated in the network and the network load is large, largest area and consumes the largest power consump- the data packets buffered in the input buffer will become tion in the entire router, reducing the use of the buffer more and more arriving, and the transmission delay will also increase with the increase of the waiting time of the data can save resources to a large extent. If you want the structure to transmit two flits at the same time to achieve packets, which will seriously affect the network performance of 3DNoC. In order to reduce the transmission delay, the high-speed data transmission, you can perform flit-level acceleration processing on the data packets, such as using author redesigned the architecture of the TSV router in 4 International Transactions on Electrical Energy Systems Fault1 Fault2 Fault1 TX FIFO Output control module BX Port with BIST Idle FSM Fault3 TX Send TSV RX Output control BX Idle Two-way TSV module Fault2 Fault3 TSV Router RX TSV Router Receive TSV up down Figure 2: Bidirectional TSV fault-tolerant design. 3DNoC by using the architecture of the dual crossbar router crossbar and the slave crossbar, which can help each other in 2DNoC proposed in [16]. and complement each other [19]. )e designed crossbar consists of a master crossbar and a Define 1Mfault to represent the fault condition of slave crossbar. Each input port of the TSV router is divided MasterCrossbar, into two subports by a data distributor (Demultiplexer, DMUX), which are respectively connected to the master 0, No trouble, crossbar and the slave crossbar. )ere is no input buffer on Mfault � 􏼨 (1) 1, failure. the path connected to the master crossbar, and there is an input buffer on the path connected to the slave crossbar; each Define 2Sfault to represent the fault condition of Slave output port is set with a data selector (Multiplexer, MUX) Crossbar, connected to the master crossbar and the slave crossbar, respectively [17]. 0, No trouble, Sfault � 􏼨 (2) )e master crossbar has higher priority than the slave 1, failure. crossbar. As long as there is data input from the port of the TSV router, the master crossbar is preferentially selected for )e fault-tolerant mechanism of double crossbar transmission; only when the master crossbar is occupied, the switches detects whether the master and slave crossbars are slave crossbar is selected for transmission, and the data faulty at the same time through BIST and feeds back the passing through this path must pass through the input buffer detected Mfault and Sfault signal values to the crossbar cache [18]. If there is a new data request for transmission at arbiter (SA). After receiving the feedback signal from the this time, as long as the master crossbar is idle, the master BIST, the SA knows whether the crossbar switch of the crossbar is preferred; otherwise, it must be cached in the router is faulty according to the value of the feedback signal buffer and then transmitted through the slave crossbar. and then allocates the crossbar switch according to the fault When data packets are transmitted through the master condition. If Mfault = 0 and Sfault = 0, then a single data crossbar path, there is no need to buffer the data, the data can packet preferentially selects the master crossbar of the router be transmitted directly through the link, and the delay and to transmit data and only selects the slave crossbar for power consumption of the link are much smaller than that of transmission when the master crossbar is occupied; if the buffer; this is the main reason why the author designed multiple data packets are requested at the same time, the the TSV router power as a dual crossbar. On the other hand, master crossbar and slave crossbar can be used to transmit the design of the double crossbar switch also has the function data at the same time under the principle of two-level of fault tolerance. In the traditional design, there is only one crossbar priority. crossbar switch, if a hardware failure occurs in this crossbar If one of the feedback signals has a value of 1, which switch, the entire TSV router cannot complete the routing indicates that one of the double crossbars is faulty, the data and forwarding of data packets, and the entire router will be packet can only select the crossbar whose fault signal value is scrapped, resulting in a great waste of resources. In the 0 in the router for transmission [20]. )ere are two cases for author’s dual crossbar TSV router, the original crossbar has this, which are as follows: been replaced by the current two crossbars, the master International Transactions on Electrical Energy Systems 5 pipeline segment is only reduced by one segment, as shown (1) When Mfault � 1 and Sfault � 0, the master crossbar is faulty, and the data packet can only select the slave in Figure 3(c). Since the pipeline segment of each data packet is reduced, the transmission delay of the whole network of crossbar to transmit data. 3DNoC is also reduced [22]. (2) When Mfault � 0, Sfault � 1, the slave crossbar is faulty, and the data packet can only select the master 4. Results Analysis crossbar to transmit data. )erefore, the structure of the double crossbar switch )e experimental tool for network simulation analysis uses can realize fault tolerance. In the event of a failure of one of OPNETsimulation software to build a 4 × 4 × 3 3DmeshNoC the two crossbar switches, data can be passed through the model. In the process model modeled by OPNET, the other faultless crossbar switch without being blocked. router-related routing algorithm is set well, and the author’s If the main crossbar fails, our original intention of re- experimental communication still adopts a convincing ducing power consumption and delay will not be realized, random power communication mode. In the simulation but data can still be transmitted through the slave crossbar experiment, under different packet injection rates, com- and become a traditional router transmission. If the slave paring the network performance between the author’s crossbar fails, the data packets can still be transmitted proposed scheme and the communication architecture through the master crossbar, but the master crossbar does proposed in the literature, the transmission delay of data not have an input buffer, which reduces power consumption packets in the network is used as a technical indicator. and delay and also reduces the throughput of the system, as Before completing the experiment, first introduce two well as the performance of 3DNoC will decrease accordingly. nouns: the Manhattan distance and the hop count. It is clear that although in the double crossbar design, there is (1) Manhattan distance refers to the subtraction of the a failure in the system performance which will be affected; corresponding X, Y, and Z coordinates of two re- however, another one can be used to achieve fault tolerance source nodes in the 3DNoC network, and the sum of so that data can be transmitted smoothly. Moreover, the TSV their absolute values is taken; this sum is the router can still work, and the whole router will not be Manhattan distance. For example, the coordinates of disabled due to the failure of the crossbar switch, thus saving the source node are(X , Y , Z ), and the coordinates s s s router resources. of the destination node are(X , Y , Z ), which is the d d d Manhattan distance between the source node and the destination node as follows: 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 3.3.2. TSV Router Pipeline Segment. In the 3DNoC archi- 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 diff � 􏼌X − X 􏼌 + 􏼌Y − Y 􏼌 + 􏼌Z − Z 􏼌. (3) s d s d s d tecture designed by the author, all 2D routers adopt the four- stage pipeline shown in Figure 3(a). (a) )e figure shows the (2) Hop count refers to the sum of the number of routers 4-stage basic pipeline of a TSV router without virtual separated by the source node and the destination channels. When the data packet arrives at the TSV router, it node in the X and Y directions. is first buffered in the buffer, that is, the write buffer (BufferWrite, BW); then, through routing calculation )e delay of data packet transmission is mainly affected (routing computation, RC), the routing information of the by the location and routing algorithm of the source resource data packet is obtained; after determining the next-hop node and destination resource node in 3DNoC. If the address of the data packet, the cross switch allocation (switch Manhattan distance between two resource nodes is far away, allocation, SA) is performed; the cross switch determines the number of routing hops will increase when they com- which port to output the data packet from according to the municate between them, and the transmission delay will result of route calculation and cross switch allocation, that is, increase with it [23]; on the contrary, the number of hops the cross switch transmission (Switch Transmission, ST); will be very small, and the delay will be very small. )e power after going through four basic pipelines, the data packets are communication between resource nodes is completed transmitted through the link (link transmission) and routed according to the corresponding routing algorithm; if the to the next-hop TSV router. )is is a traditional router efficiency of the routing algorithm is relatively low, the short pipeline that does not use virtual channels. Manhattan distance needs to be detoured to reach it, and the )e design of the TSV router adopts the forward routing transmission delay will increase [24, 25]. strategy to further reduce the pipeline segment, and after the )e author’s experimental results are shown in TSV router adopts the design of the double crossbar switch, Figures 4–7, and the results show that when the author’s the master crossbar switch and the slave crossbar switch can fault-tolerant scheme is not combined with the double transmit data packets at the same time, so SA and ST can be crossbar switch, the transmission delay is still much less than in the same segment of the pipeline [21]. Moreover, the data that of the literature because the author realizes fault tol- packets passing through the main crossbar switch do not erance for the faulty TSV by adding a bidirectional TSV to need to be written to the buffer BW. )erefore, the pipeline replace the faulty TSV. )erefore, when there is a TSV can be reduced by two stages at most, as shown in failure, the transmission delay increases with the increase in Figure 3(b), which is the optimal delay. If the data packet is the number of failures, but the author’s design can make the transmitted from the crossbar switch, it is necessary to data packets transmitted in the network without being increase the BW pipeline after the RC, and the overall affected. 6 International Transactions on Electrical Energy Systems SA SA BW RC SA ST LT R1 RC LT R1 RC BW LT ST ST SA SA R2 RC LT R2 RC BW LT ST ST (a) (b) (c) Figure 3: Router pipeline segment. (a) No virtual channel. (b) )e main crossbar switch. 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A Fault-Tolerant Structure for Nano-Power Communication Based on the Multidimensional Crossbar Switch Network

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Copyright © 2022 Jun Luo and Boxun Liao. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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Hindawi International Transactions on Electrical Energy Systems Volume 2022, Article ID 4783847, 8 pages https://doi.org/10.1155/2022/4783847 Research Article A Fault-Tolerant Structure for Nano-Power Communication Based on the Multidimensional Crossbar Switch Network Jun Luo and Boxun Liao Guangzhou College of Technology and Business, Guangzhou, Guangdong 510850, China Correspondence should be addressed to Jun Luo; 2020020544@stu.cdut.edu.cn Received 14 July 2022; Revised 26 July 2022; Accepted 1 August 2022; Published 24 August 2022 Academic Editor: Nagamalai Vasimalai Copyright © 2022 Jun Luo and Boxun Liao. )is is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. In order to realize fault tolerance and further reduce the transmission delay, a fault-tolerant structure design method for nano- power communication based on a multidimensional crossbar switch network is proposed. )e TSV router is designed as a double crossbar structure, namely the master crossbar (MasterCrossbar) and the slave crossbar (SlaveCrossbar). Each input port of the TSV router is divided into two subports. )e port connected to the master crossbar has no input buffer, and the port connected to the slave crossbar has an input buffer. Master crossbar is the first choice for data transmission, and slave crossbar is selected when it is busy to reduce the transmission delay of data packets and reduce power consumption. Dual crossbar switches can also realize the fault tolerance of crossbar switches. )e experimental results show that the author’s fault-tolerant scheme, without in- corporating the double crossbar switch, still has a much smaller transmission delay than the reference because the author realizes fault tolerance for defective TSVs by adding bidirectional TSVs to replace faulty TSVs. )erefore, when there is a TSV failure, the reference transmission delay increases with the number of failures, but the author’s design allows packets to be transmitted in the network without being affected; the author’s bidirectional TSV fault-tolerant design is combined with the double crossbar design. After that, the transmission delay is smaller than the original, and the maximum transmission delay is about 40% faster than the reference. )e authors’ design is superior and improves the reliability of the 3DNoC system. the middle layer, and communication modules are placed on 1. Introduction the bottom layer. Due to the huge difference in the area and 3DNoC is a multilayer wafer (die) interconnection through function of the devices in each layer, it is difficult for such a through-hole via (TSV) and uses the network structure to design to achieve the same layout of network nodes on each interconnect the interconnection of resource nodes. Com- layer; it is possible to have a network structure with n∗ n on mon 3DNoC topology structures include 3DMesh, 3DToms, a certain layer and a network structure with m∗ m (m≠n) on 3D stacked Mesh, and others, among them, and the structure the upper layer, and as a result, some routing nodes have widely studied by many scholars is 3DMeshtW. )e tradi- upward or downward channels, that is, TSVs are connected, tional 3DMesh structure is a regular 3D network structure while some nodes do not have vertical channels [2]. Such a formed by stacking regular 2DNoCs up and down, and each structure makes it difficult to use traditional 3D routing layer realizes interlayer power communication through TSV. algorithms to achieve the purpose of transmitting data At present, most of the research on 3DNoC is based on this packets. regular 3DMesh topology [1]. Today, the chip manufacturing process has entered a However, in today’s industrial design, it is usually level below 65 nanometers, the process is becoming more necessary to place modules that implement different func- and more complex, and the manufacturing difficulty is tions on different layers of a 3D chip, for example, the CPU becoming more and more difficult. )e size of TSV is only core is placed on the top layer, RAM and ROM are placed on about 10 microns, and the current TSV manufacturing 2 International Transactions on Electrical Energy Systems space is divided into 8 quadrants, and the corresponding technology is not mature enough, the manufacturing cost is high, and it is easy to cause voids, fractures, misalignment, routing strategy is determined for each elephant limit so as to avoid deadlock [9]. Yang, S. et al. proposed a fault- and so on in the manufacturing process, resulting in TSV failure. )e yield of TSVs has become one of the decisive tolerant routing algorithm based on cache reuse of faulty factors affecting the yield of the entire chip, and when the links, the algorithm adds 4 self-transmitting channels to number of TSVs reaches a certain order of magnitude, the each power communication node and adopts a trans- yield of chips will decline exponentially. )e data show that parent transmission mechanism based on cache reuse, by for a silicon chip manufactured by using 65 nm CMOS multiplexing the normal buffers and channels at both process technology, 46%–65% of the cost overhead is used in ends of the faulty link to transparently transmit the data the processing of TSV. )erefore, under the premise of packets on the faulty channel, and the probability of ensuring chip communication, the number of TSVs should using the optimal output port for the data packets is improved [10]. Wang, H. et al. proposed a virtual be as small as possible [3]. channel-free fault-tolerant routing algorithm for node failures in 3DmeshNoC, which is based on 3D defense 2. Literature Review areas. )e 3D defense area can provide the location information of the faulty body, and according to the )e fusion of 3D technology and NoC technology brings new opportunities for the development of integrated location information of the faulty body provided by the circuit technology and at the same time brings new defense area, the algorithm can find the fault location in challenges. One of them is TSV failure due to physical advance and change the forwarding port so as to achieve defects, which affects 3DNoC yield. In order to solve the fault tolerance and avoid introducing deadlock [11]. yield problem of 3D chips, TSV fault tolerance research In 3DNoC, if two sets of unidirectional TSVs connecting has gradually been reported in recent years, arousing the adjacent routers fail, data cannot be transmitted through this channel. In order to achieve fault tolerance and further attention of researchers at home and abroad. Guennoc, T. et al. first proposed a circuit model for vertical reduce transmission delay and power consumption, the author designs the TSV router in 3DNoC as a double channels and then proposed a fault-tolerant technology for TSV redundancy, which improved the yield from 66% crossbar switch structure, and each input port is divided into to 98% [4]. Xiao, Y. et al. proposed a fault-tolerant ap- two subports without input buffer (buffer) and with input proach based on multichannel, which can improve re- buffer; it is connected with the two-stage crossbar Master- liability and throughput at the same time [5]. Afterward, Crossbar and SlaveCrossbar, respectively. Compared with researchers aimed at the process differences and scales of reference, experiments show that by organically combining different chips, and many TSV fault tolerance mecha- the improved redundant TSV fault-tolerant design and the nisms are designed to meet the performance require- design of double crossbar switches, the average delay of the ments of the chip. Zhang, X. et al. proposed that when the network can be reduced, the area overhead of the buffer in the chip is reduced, the power consumption is reduced, and TSV failure rate is too high, using serial power com- munication and signal remapping, remap the commu- the system reliability is improved. nication channel to the fault-free channel, thereby ensuring the smoothness of the vertical channel which is shown in Figure 1 as a communication method based on 3. Research Methods the binary molecular communication model [6]. Some 3.1. Overview of Crossbar Fault Tolerance. In the structure domestic universities and research institutes have of the 3DNoC router, the crossbar is the core component, designed circuits including TSV fault self-detection and under the cooperative operation of the arbiter and function and fault-tolerant function and also proposed the control module, it can process data from different several redundant circuits based on chain structure, high input ports and select the corresponding output port to yield can be guaranteed when the number of TSVs is output. If the crossbar fails, it will greatly affect the small, and the number of redundant TSVs can be opti- performance of the router power. )erefore, the fault mized to the greatest extent; Gao, H. et al. proposed a tolerance of the crossbar switch needs to be considered bidirectional redundant fault-tolerant design, which [12]. enables redundant channel clusters to dynamically )ere is a fault-tolerant scheme that adds a bypass configure direction and interconnection with low latency mechanism to bypass the faulty crossbar, and in this scheme, and high throughput [7]. Zhang, Y. et al. proposed a if the crossbar fails, data are transferred through the bypass. fault-tolerant routing algorithm based on local fault Alternatively, between each input and output port on either blocks, which uses extended local reliability information side of the crossbar, an error detection module for cyclic to guide fault-tolerant routing of 3D mesh/torus net- redundancy check (CRC) is added, and if a data error is works and classifies fault-free nodes within each plane, detected, the data will be discarded or retransmitted. All which greatly improves the system’s performance. unidirectional TSVs in 3DNoC are configured as bidirec- Computing power and system performance [8]. Chak- tional TSVs, which have certain fault tolerance; however, rabarti, A. et al. proposed a deadlock-free three-di- when the unidirectional TSVs between adjacent TSV routers mensional dynamic routing algorithm, based on the all fail, fault tolerance cannot be achieved. traditional 2D NoC parity-turn model, the 3D routing International Transactions on Electrical Energy Systems 3 Molecular transport The receiver channel nanomachine Establish mathematical Sending nanomachine expressions The rate at which the sending Throughput and efficiency nanomachine sends the message of receiving information molecule and the probability molecules by receiver nanomachines of sending 1 in each slot Figure 1: A communication method based on the binary molecular communication model. In addition, the delay and power consumption the flit-level acceleration mechanism of the virtual problems faced in 2DNoC are also problems that 3DNoC channel, combined with the control module of the bi- hopes to solve. Its delay and power consumption are directional link, in order to realize the flit-level accel- mainly distributed among the link, crossbar, and input eration high-speed transmission [15]. buffer. )e power consumption of the input buffer ac- counts for 46% of the total power consumption [13]. Some researchers reduce the input buffer or remove the 3.3. TSV Router Architecture buffer, but this will reduce the performance of the net- 3.3.1. Design and Fault Tolerance of Double Crossbar. In work [14]. )e author modified the fault-tolerant design of re- order to further reduce the transmission delay of the net- work, realize the fault tolerance of the crossbar switch, and dundant bidirectional TSVs, reducing the original two subinput buffers, and at the same time, combining with the improve the performance of the whole 3DNoC system, the author designs the TSV router power in 3DNoC as double design of the double crossbar switch of the router, the TSV router in the 3DNoC architecture is designed as a double crossbar switch architecture. In the cluster-based 3DNoC architecture, which com- crossbar switch architecture, which can reduce power consumption and delay while realizing fault tolerance. monly used TSV routers without virtual channels, each TSV router has 6 input and output ports, namely east-north (EN), west-north (WN), east-south (ES), west-south (WS), up 3.2. Bidirectional TSV Fault Tolerant Architecture. )e au- (UP), and down (DW). )ese six ports are, respectively, thor has 3DNoC communication architecture, where responsible for the power communication with the four 2D every four 2D routers share a TSV router. When data routers in different directions in the same cluster and the packets require interlayer communication, the XYZ TSV routers in the upper and lower adjacent layers. In order routing algorithm is used. First, the data packet is routed to prevent out-of-order crosstalk of data packets during on the same plane to reach the cluster corresponding to transmission, the author’s data packets are only designed in the cluster where the destination node is located, and the format of a data flit. then the data packet is transmitted to the TSV router for In 3DNoC, data packet transmission must go through transmission along the Z direction through TSV. the crossbar switch, and the data packet can transmit data )e author’s bidirectional TSV fault-tolerant design smoothly only after being assigned to the crossbar switch. When there are multiple data packets requesting trans- structure is shown in Figure 2, which is perfected and modified on the basis of redundant bidirectional TSV mission, the data packets that cannot be allocated by the fault-tolerant design. )e structure design reduces the crossbar switch and cannot be transmitted in time will be buffer area and at the same time removes the package buffered in the input buffer and wait, as well as packets assembly module in the original design so that the overall cannot be transmitted until the crossbar arbiter responds design is more concise and the area cost is smaller. and assigns the crossbar. If there are many data packets Because the buffer is the component that occupies the communicated in the network and the network load is large, largest area and consumes the largest power consump- the data packets buffered in the input buffer will become tion in the entire router, reducing the use of the buffer more and more arriving, and the transmission delay will also increase with the increase of the waiting time of the data can save resources to a large extent. If you want the structure to transmit two flits at the same time to achieve packets, which will seriously affect the network performance of 3DNoC. In order to reduce the transmission delay, the high-speed data transmission, you can perform flit-level acceleration processing on the data packets, such as using author redesigned the architecture of the TSV router in 4 International Transactions on Electrical Energy Systems Fault1 Fault2 Fault1 TX FIFO Output control module BX Port with BIST Idle FSM Fault3 TX Send TSV RX Output control BX Idle Two-way TSV module Fault2 Fault3 TSV Router RX TSV Router Receive TSV up down Figure 2: Bidirectional TSV fault-tolerant design. 3DNoC by using the architecture of the dual crossbar router crossbar and the slave crossbar, which can help each other in 2DNoC proposed in [16]. and complement each other [19]. )e designed crossbar consists of a master crossbar and a Define 1Mfault to represent the fault condition of slave crossbar. Each input port of the TSV router is divided MasterCrossbar, into two subports by a data distributor (Demultiplexer, DMUX), which are respectively connected to the master 0, No trouble, crossbar and the slave crossbar. )ere is no input buffer on Mfault � 􏼨 (1) 1, failure. the path connected to the master crossbar, and there is an input buffer on the path connected to the slave crossbar; each Define 2Sfault to represent the fault condition of Slave output port is set with a data selector (Multiplexer, MUX) Crossbar, connected to the master crossbar and the slave crossbar, respectively [17]. 0, No trouble, Sfault � 􏼨 (2) )e master crossbar has higher priority than the slave 1, failure. crossbar. As long as there is data input from the port of the TSV router, the master crossbar is preferentially selected for )e fault-tolerant mechanism of double crossbar transmission; only when the master crossbar is occupied, the switches detects whether the master and slave crossbars are slave crossbar is selected for transmission, and the data faulty at the same time through BIST and feeds back the passing through this path must pass through the input buffer detected Mfault and Sfault signal values to the crossbar cache [18]. If there is a new data request for transmission at arbiter (SA). After receiving the feedback signal from the this time, as long as the master crossbar is idle, the master BIST, the SA knows whether the crossbar switch of the crossbar is preferred; otherwise, it must be cached in the router is faulty according to the value of the feedback signal buffer and then transmitted through the slave crossbar. and then allocates the crossbar switch according to the fault When data packets are transmitted through the master condition. If Mfault = 0 and Sfault = 0, then a single data crossbar path, there is no need to buffer the data, the data can packet preferentially selects the master crossbar of the router be transmitted directly through the link, and the delay and to transmit data and only selects the slave crossbar for power consumption of the link are much smaller than that of transmission when the master crossbar is occupied; if the buffer; this is the main reason why the author designed multiple data packets are requested at the same time, the the TSV router power as a dual crossbar. On the other hand, master crossbar and slave crossbar can be used to transmit the design of the double crossbar switch also has the function data at the same time under the principle of two-level of fault tolerance. In the traditional design, there is only one crossbar priority. crossbar switch, if a hardware failure occurs in this crossbar If one of the feedback signals has a value of 1, which switch, the entire TSV router cannot complete the routing indicates that one of the double crossbars is faulty, the data and forwarding of data packets, and the entire router will be packet can only select the crossbar whose fault signal value is scrapped, resulting in a great waste of resources. In the 0 in the router for transmission [20]. )ere are two cases for author’s dual crossbar TSV router, the original crossbar has this, which are as follows: been replaced by the current two crossbars, the master International Transactions on Electrical Energy Systems 5 pipeline segment is only reduced by one segment, as shown (1) When Mfault � 1 and Sfault � 0, the master crossbar is faulty, and the data packet can only select the slave in Figure 3(c). Since the pipeline segment of each data packet is reduced, the transmission delay of the whole network of crossbar to transmit data. 3DNoC is also reduced [22]. (2) When Mfault � 0, Sfault � 1, the slave crossbar is faulty, and the data packet can only select the master 4. Results Analysis crossbar to transmit data. )erefore, the structure of the double crossbar switch )e experimental tool for network simulation analysis uses can realize fault tolerance. In the event of a failure of one of OPNETsimulation software to build a 4 × 4 × 3 3DmeshNoC the two crossbar switches, data can be passed through the model. In the process model modeled by OPNET, the other faultless crossbar switch without being blocked. router-related routing algorithm is set well, and the author’s If the main crossbar fails, our original intention of re- experimental communication still adopts a convincing ducing power consumption and delay will not be realized, random power communication mode. In the simulation but data can still be transmitted through the slave crossbar experiment, under different packet injection rates, com- and become a traditional router transmission. If the slave paring the network performance between the author’s crossbar fails, the data packets can still be transmitted proposed scheme and the communication architecture through the master crossbar, but the master crossbar does proposed in the literature, the transmission delay of data not have an input buffer, which reduces power consumption packets in the network is used as a technical indicator. and delay and also reduces the throughput of the system, as Before completing the experiment, first introduce two well as the performance of 3DNoC will decrease accordingly. nouns: the Manhattan distance and the hop count. It is clear that although in the double crossbar design, there is (1) Manhattan distance refers to the subtraction of the a failure in the system performance which will be affected; corresponding X, Y, and Z coordinates of two re- however, another one can be used to achieve fault tolerance source nodes in the 3DNoC network, and the sum of so that data can be transmitted smoothly. Moreover, the TSV their absolute values is taken; this sum is the router can still work, and the whole router will not be Manhattan distance. For example, the coordinates of disabled due to the failure of the crossbar switch, thus saving the source node are(X , Y , Z ), and the coordinates s s s router resources. of the destination node are(X , Y , Z ), which is the d d d Manhattan distance between the source node and the destination node as follows: 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 3.3.2. TSV Router Pipeline Segment. In the 3DNoC archi- 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 􏼌 diff � 􏼌X − X 􏼌 + 􏼌Y − Y 􏼌 + 􏼌Z − Z 􏼌. (3) s d s d s d tecture designed by the author, all 2D routers adopt the four- stage pipeline shown in Figure 3(a). (a) )e figure shows the (2) Hop count refers to the sum of the number of routers 4-stage basic pipeline of a TSV router without virtual separated by the source node and the destination channels. When the data packet arrives at the TSV router, it node in the X and Y directions. is first buffered in the buffer, that is, the write buffer (BufferWrite, BW); then, through routing calculation )e delay of data packet transmission is mainly affected (routing computation, RC), the routing information of the by the location and routing algorithm of the source resource data packet is obtained; after determining the next-hop node and destination resource node in 3DNoC. If the address of the data packet, the cross switch allocation (switch Manhattan distance between two resource nodes is far away, allocation, SA) is performed; the cross switch determines the number of routing hops will increase when they com- which port to output the data packet from according to the municate between them, and the transmission delay will result of route calculation and cross switch allocation, that is, increase with it [23]; on the contrary, the number of hops the cross switch transmission (Switch Transmission, ST); will be very small, and the delay will be very small. )e power after going through four basic pipelines, the data packets are communication between resource nodes is completed transmitted through the link (link transmission) and routed according to the corresponding routing algorithm; if the to the next-hop TSV router. )is is a traditional router efficiency of the routing algorithm is relatively low, the short pipeline that does not use virtual channels. Manhattan distance needs to be detoured to reach it, and the )e design of the TSV router adopts the forward routing transmission delay will increase [24, 25]. strategy to further reduce the pipeline segment, and after the )e author’s experimental results are shown in TSV router adopts the design of the double crossbar switch, Figures 4–7, and the results show that when the author’s the master crossbar switch and the slave crossbar switch can fault-tolerant scheme is not combined with the double transmit data packets at the same time, so SA and ST can be crossbar switch, the transmission delay is still much less than in the same segment of the pipeline [21]. Moreover, the data that of the literature because the author realizes fault tol- packets passing through the main crossbar switch do not erance for the faulty TSV by adding a bidirectional TSV to need to be written to the buffer BW. )erefore, the pipeline replace the faulty TSV. )erefore, when there is a TSV can be reduced by two stages at most, as shown in failure, the transmission delay increases with the increase in Figure 3(b), which is the optimal delay. If the data packet is the number of failures, but the author’s design can make the transmitted from the crossbar switch, it is necessary to data packets transmitted in the network without being increase the BW pipeline after the RC, and the overall affected. 6 International Transactions on Electrical Energy Systems SA SA BW RC SA ST LT R1 RC LT R1 RC BW LT ST ST SA SA R2 RC LT R2 RC BW LT ST ST (a) (b) (c) Figure 3: Router pipeline segment. (a) No virtual channel. (b) )e main crossbar switch. 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Journal

International Transactions on Electrical Energy SystemsHindawi Publishing Corporation

Published: Aug 24, 2022

References