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SSS

SSS Network-on-Chip (NoC) has become the de facto communication standard for multi-core or many-core System-on-Chip (SoC) due to its scalability and flexibility. However, an important factor in NoC design is temperature, which affects the overall performance of SoC—decreasing circuit frequency, increasing energy consumption, and even shortening chip lifetime. In this article, we propose SSS, a self-aware SoC using a static-dynamic hybrid method that combines dynamic mapping and static mapping to reduce the hotspot temperature for NoC-based SoCs. First, we propose monitoring and thermal modeling for self-state sensoring. Then, in static mapping stage, we calculate the optimal mapping solutions under different temperature modes using the discrete firefly algorithm to help self-decision making. Finally, in dynamic mapping stage, we achieve dynamic mapping through configuring NoC and SoC sentient units for self-optimizing. Experimental results show that SSS has substantially reduced the peak temperature by up to 37.52%. The FPGA prototype proves the effectiveness and smartness of SSS in reducing hotspot temperature. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Journal on Emerging Technologies in Computing Systems (JETC) Association for Computing Machinery

SSS

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Publisher
Association for Computing Machinery
Copyright
Copyright © 2019 ACM
ISSN
1550-4832
eISSN
1550-4840
DOI
10.1145/3313869
Publisher site
See Article on Publisher Site

Abstract

Network-on-Chip (NoC) has become the de facto communication standard for multi-core or many-core System-on-Chip (SoC) due to its scalability and flexibility. However, an important factor in NoC design is temperature, which affects the overall performance of SoC—decreasing circuit frequency, increasing energy consumption, and even shortening chip lifetime. In this article, we propose SSS, a self-aware SoC using a static-dynamic hybrid method that combines dynamic mapping and static mapping to reduce the hotspot temperature for NoC-based SoCs. First, we propose monitoring and thermal modeling for self-state sensoring. Then, in static mapping stage, we calculate the optimal mapping solutions under different temperature modes using the discrete firefly algorithm to help self-decision making. Finally, in dynamic mapping stage, we achieve dynamic mapping through configuring NoC and SoC sentient units for self-optimizing. Experimental results show that SSS has substantially reduced the peak temperature by up to 37.52%. The FPGA prototype proves the effectiveness and smartness of SSS in reducing hotspot temperature.

Journal

ACM Journal on Emerging Technologies in Computing Systems (JETC) – Association for Computing Machinery

Published: Apr 25, 2019

Keywords: Network on chip

References

  • 1
    Hou, C.
  • Architectural Concepts for Self-aware Computing Systems
    Giese, Holger; Vogel, Thomas; Diaconescu, Ada; Götz, Sebastian; Kounev, Samuel
  • Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse
    Taylor, Michael B.
  • Hierarchical agent monitoring design approach towards self-aware parallel systems-on-chip
    Guang, Liang; Nigussie, Ethiopia; Rantala, Pekka; Isoaho, Jouni; Tenhunen, Hannu
  • Self-adaptive NoC power management with dual-level agents: Architecture and implementation
    Jafri, Syed M. A. H.; Guang, Liang; Jantsch, Axel; Paul, Kolin; Hemani, Ahmed; Tenhunen, Hannu
  • A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation
    Sinangil, Yildiz; Neuman, Sabrina M.; Sinangil, Mahmut E.; Ickes, Nathan; Bezerra, George; Lau, Eric; Miller, Jason E.; Hoffmann, Henry C.; Devadas, Srini; Chandraksan, Anantha P.
  • Self-aware cyber-physical systems-on-chip
    Dutt, Nikil; Jantsch, Axel; Sarma, Santanu
  • Toward smart embedded systems: A self-aware system-on-chip (SoC) perspective
    Dutt, Nikil; Jantsch, Axel; Sarma, Santanu
  • Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs
    Navas, Byron; Sander, Ingo; Oberg, Johnny
  • Self-awareness and self-learning for resiliency in real-time systems
    Tahoori, Mehdi B.; Chatterjee, Abhijit; Chakrabarty, Krishnendu; Koneru, Abhishek; Vijayan, Arunkumar; Banerjee, Debashis
  • The role of self-awareness and hierarchical agents in resource management for many-core systems
    Gotzinger, Maximilian; Rahmani, Amir M.; Pongratz, Martin; Liljeberg, Pasi; Jantsch, Axel; Tenhunen, Hannu
  • The vision of autonomic computing
    Kephart, Jeffrey O.; Chess, David M.
  • Self-adaptive software: Landscape and research challenges
    Salehie, Mazeiar; Tahvildari, Ladan
  • Engineering of self-aware IT systems and services: State-of-the-art and research challenges
    Kounev, Samuel
  • Self-awareness in systems on-chip—A survey
    Jantsch, Axel; Dutt, Nikil; Rahmani, Amir M.
  • A dynamic task mapping algorithm for SDNoC
    Zhou, Xiaofeng; Zhu, Zhangming
  • Dynamic NoC platform for varied application needs
    Rout, Sidhartha Sankar; Mondai, Hemanta Kumar; Juneja, Rohan; Gade, Sri Harsha; Deb, Sujay
  • Elastic superposition task mapping for NoC-based reconfigurable systems
    Huang, Chun-Hsian; Wang, Chien-Yu; Hsiung, Pao-Ann
  • AROMa: Aging-aware deadlock-free adaptive routing algorithm and online monitoring in 3D NoCs
    Ghaderi, Zana; Alqahtani, Ayed; Bagherzadeh, Nader
  • ARTEMIS: An aging-aware runtime application mapping framework for 3D NoC-based chip multiprocessors
    Raparti, Venkata Yaswanth; Kapadia, Nishit; Pasricha, Sudeep
  • Thermal sensor allocation and full-system temperature characterization for thermal-aware mesh-based NoC system by using compressive sensing technique
    Chen, Kun-Chih; Chen, Yu-Hsien; Lin, Yen-Po
  • Kalman predictor-based proactive dynamic thermal management for 3D NoC systems with noisy thermal sensors
    Fu, Yuxiang; Li, Li; Wang, Kun; Zhang, Chuan
  • Thermal-aware application mapping strategy for network-on-chip based system design
    Manna, Kanchan; Mukherjee, Priyajit; Chattopadhyay, Santanu; Sengupta, Indranil
  • Congestion-aware core mapping for network-on-chip based systems using betweenness centrality
    Maqsood, Tahir; Bilal, Kashif; Madani, Sajjad A.
  • Energy-aware application-specific topology generation for 3D network-on-chips
    Barzinmehr, Arash; Tosun, Suleyman
  • PDA-HyPAR: Path-diversity-aware hybrid planar adaptive routing algorithm for 3D NoCs
    Dai, Jindun; Li, Renjie; Jiang, Xin; Watanabe, Takahiro
  • Dark silicon-power-thermal-aware runtime mapping and configuration in heterogeneous many-core NoC
    Reza, Md Farhadur; Zhao, Dan; Bayoumi, Magdy
  • P2NoC: Power- and performance-aware NoC architectures for sustainable computing
    Mondal, Hemanta Kumar; Gade, Sri Harsha; Kishore, Raghav; Deb, Sujay
  • Performance and energy aware wavelength allocation on ring-based WDM 3D optical NoC
    Luo, J.; Elantably, A.; Pham, V. D.; Killian, C.; Chillet, D.; Beux, S. Le; Sentieys, O.; O’Connor, I.
  • Energy aware networks-on-chip cortex inspired communication
    Moreac, Erwan; Laurent, Johann; Bomel, Pierre; Rossi, Andre; Boutillon, Emmanuel; Palesi, Maurizio
  • Deadline, energy and buffer-aware task mapping optimization in NoC-based SoCs using genetic algorithms
    Bruch, Jaison Valmor; Silva, Eduardo Alves Da; Zeferino, Cesar Albenes; Indrusiak, Leandro Soares
  • Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3D-MPSoCs
    Chaturvedi, V.; Singh, A.; Zhang, Wei; Srikanthan, T.
  • Routing-based traffic migration and buffer allocation schemes for 3D network-on-chip systems with thermal limit
    Chao, Chih Hao; Chen, Kun Chih; Wu, An Yeu
  • Traffic- and thermal-aware adaptive beltway routing for three-dimensional network-on-chip systems
    Chen, Kun Chih; Kuo, Che Chuan; Hung, Hui Shun; Wu, A. Y. A.
  • Exploration of temperature constraints for thermal-aware mapping of 3D networks on chip
    Hamedani, Parisa Khadem; Hessabi, Shaahin; Sarbazi-Azad, Hamid; Jerger, Natalie Enright
  • Energy and thermal-aware mapping for mesh-based NoC architectures using multi-objective ant colony algorithm
    Liu, Yanhua; Ying, Ruan; Lai, Zongsheng; Jing, Weiping
  • A thermal-aware mapping algorithm for 3D mesh network-on-chip architecture
    Feng, Gui; Ge, Fen; Yu, Shuang; Wu, Ning
  • Thermal variance-aware application mapping for mesh based network-on-chip design using Kernighan-Lin partitioning
    Manna, Kanchan; Choubey, Vedic; Chattopadhyay, Santanu; Sengupta, Indranil
  • MSP based thermal-aware mapping approach for 3D network-on-chip under performance constraints
    Feng, Gui; Ge, Fen; Wu, Ning; Zhou, Lei; Liu, Jing
  • NoC hot spot minimization using AntNet dynamic routing algorithm
    Daneshtalab, M.; Sobhani, A.; Afzali-Kusha, A.; Fatemi, O.; Navabi, Z.
  • DTBR: A dynamic thermal-balance routing algorithm for network-on-chip
    Liu, Feiyang; Gu, Huaxi; Yang, Yintang
  • XYZ--ZXY: A minimal routing algorithm for dynamic thermal management in 3D NoCs
    Taheri, E.; Patooghy, A.; Mohammadi, K.
  • TAPP: Temperature-aware application mapping for NoC-based many-core processors
    Zhu, Di; Chen, Lizhong; Pinkston, Timothy M.; Pedram, Massoud
  • RC-based temperature prediction scheme for proactive dynamic thermal management in throttle-based 3D NoCs
    Chen, Kun-Chih; Chang, En-Jui; Li, Huai-Ting; Wu, An-Yeu Andy
  • Dynamic power and thermal management of NoC-based heterogeneous MPSoCs
    Kornaros, George; Pnevmatikatos, Dionisios
  • Dynamic communications mapping in multi-tasks NoC-based heterogeneous MPSoCs platform
    Benhaoua, Mohammed Kamel; Singh, Amit Kumar
  • Dynamic task mapping for network-on-chip based systems
    Maqsood, Tahir; Ali, Sabeen; Malik, Saif U. R.; Madani, Sajjad A.
  • Dark silicon aware runtime mapping for many-core systems: A patterning approach
    Kanduri, Anil; Haghbayan, Mohammad Hashem; Rahmani, Amir Mohammad; Liljeberg, Pasi
  • UNISM: Unified scheduling and mapping for general networks on chip
    He, Ou; Dong, Sheqin; Jang, Wooyoung; Bian, Jinian; Pan, David Z.
  • Static and dynamic task mapping onto network on-chip multiprocessors
    Bolaños-Martínez, Freddy; Aedo, José Edison; Rivera-Vélez, Fredy
  • Work-in-progress: SSS: Self-aware system-on-chip using static-dynamic hybrid method
    Du, Gaoming; Ma, Shibi; Li, Zhenmin; Lu, Zhonghai; Ouyang, Yiming; Gao, Minglun
  • A 2
    Xu, Dongjun; Manoj, P. D. Sai; Wang, Kanwen; Yu, Hao; Yu, Ningmei; Yu, Mingbin
  • A Q-learning based self-adaptive I/O communication for 2
    Manoj, P. D. Sai; Yu, Hao; Huang, Hantao; Xu, Dongjun
  • Analysis of power consumption on switch fabrics in network routers
    Ye, Terry Tao; Benini, Luca; De Micheli, Giovanni
  • An overview and classification of thermal-aware scheduling techniques for multi-core processing systems
    Sheikh, Hafiz Fahad; Ahmad, Ishfaq; Wang, Zhe; Ranka, Sanjay
  • Firefly algorithms for multimodal optimization
    Yang, Xin She
  • On-chip self-awareness using cyberphysical-systems-on-chip (CPSoC)
    Sarma, S.; Dutt, N.; Gupta, P.; Nicolau, A.; Venkatasubramanian, N.
  • A survey on application mapping strategies for network-on-chip design
    Sahu, Pradip Kumar; Chattopadhyay, Santanu
  • Temperature-aware microarchitecture
    Skadron, Kevin; Stan, Mircea R.; Huang, Wei; Velusamy, Sivakumar; Sankaranarayanan, Karthik; Tarjan, David