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Poly-DWT: Polymorphic Wavelet Hardware Support for Dynamic Image Compression AMIT PANDE and JOSEPH ZAMBRENO, Iowa State University Many modern computing applications have been enabled through the use of real-time multimedia processing. While several hardware architectures have been proposed in the research literature to support such primitives, these fail to address applications whose performance and resource requirements have a dynamic aspect. Embedded multimedia systems typically need a power and computation ef cient design in addition to good compression performance. In this article, we introduce a Polymorphic Wavelet Architecture (PolyDWT) as a crucial building block towards the development of embedded systems to address such challenges. We illustrate how our Poly-DWT architecture can potentially make dynamic resource allocation decisions, such as the internal bit representation and the processing kernel, according to the application requirements. We introduce a lter switching architecture that allows for dynamic switching between 5/3 and 9/7 wavelet lters and leads to a more power ef cient design. Further, a multiplier-free design with a low adder requirement demonstrates the potential of Poly-DWT for embedded systems. Through an FPGA prototype, we perform a quantitative analysis of our Poly-DWT architecture, and compare our lter to existing approaches to illustrate the area
ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery
Published: Mar 1, 2012
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