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L. Clark, James Adams, K. Holbert (2017)
Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memoryIntegr., 65
Anys Bacha, R. Teodorescu (2015)
Authenticache: Harnessing cache ECC for system authentication2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
S. Rosenblatt, S. Chellappa, A. Cestero, N. Robson, T. Kirihata, S. Iyer (2013)
A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedded DRAMIEEE Journal of Solid-State Circuits, 48
Shijie Jia, Luning Xia, Zhan Wang, Jingqiang Lin, Guozhu Zhang, Yafei Ji (2015)
Extracting robust keys from NAND flash physical unclonable functionsInformation Security (Lecture Notes in Computer Science)
Daniel Holcomb, W. Burleson, Kevin Fu (2009)
Power-Up SRAM State as an Identifying Fingerprint and Source of True Random NumbersIEEE Transactions on Computers, 58
(2009)
MSP430F543x, MSP430F541x Mixed-Signal Microcontrollers datasheet (Rev. F)
Donghyuk Lee, S. Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, V. Seshadri, O. Mutlu (2017)
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction MechanismsProceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems
Jeremie Kim, Minesh Patel, Hasan Hassan, O. Mutlu (2018)
The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern Commodity DRAM Devices2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)
Fatemeh Tehranipoor, Nima Karimian, Wei Yan, J. Chandy (2017)
DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and AuthenticationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25
André Schaller, Wenjie Xiong, N. Anagnostopoulos, Muhammad Saleem, Sebastian Gabmeyer, Boris Škorić, S. Katzenbeisser, Jakub Szefer (2019)
Decay-Based DRAM PUFs in Commodity DevicesIEEE Transactions on Dependable and Secure Computing, 16
A. Duncan, M. Gadlage, A. Roach, M. Kay (2016)
Characterizing Radiation and Stress-Induced Degradation in an Embedded Split-Gate NOR Flash MemoryIEEE Transactions on Nuclear Science, 63
The-Nghia Nguyen, Sunghyun Park, Donghwa Shin (2020)
Extraction of Device Fingerprints Using Built-in Erase-Suspend Operation of Flash Memory DevicesIEEE Access, 8
Soubhagya Sutar, Arnab Raha, V. Raghunathan (2016)
D-PUF: An intrinsically reconfigurable DRAM PUF for device authentication in embedded systems2016 International Conference on Compliers, Architectures, and Sythesis of Embedded Systems (CASES)
Shijie Jia, Luning Xia, Zhan Wang, Jingqiang Lin, Guozhu Zhang, Yafei Ji (2015)
Extracting Robust Keys from NAND Flash Physical Unclonable Functions
Muqing Liu, Chen Zhou, Qianying Tang, K. Parhi, C. Kim (2017)
A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
Maryamsadat Hashemian, B. Singh, F. Wolff, D. Weyer, Steve Clay, C. Papachristou (2015)
A robust authentication methodology using physically unclonable functions in DRAM arrays2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Yinglei Wang, Wing-Kei Yu, Shuo Wu, G. Malysa, G. Suh, E. Kan (2012)
Flash Memory for Ubiquitous Hardware Security Functions: True Random Number Generation and Device Fingerprints2012 IEEE Symposium on Security and Privacy
(2008)
MSP430 Flash memory characteristics
Prawar Poudel, B. Ray, A. Milenković (2019)
Microcontroller TRNGs Using Perturbed States of NOR Flash Memory CellsIEEE Transactions on Computers, 68
Jae Lee, D. Lim, B. Gassend, Ed Suh, Marten Dijk, S. Devadas (2004)
A technique to build a secret key in integrated circuits for identification and authentication applications2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)
B. M. S. Bahar Talukder, Biswajit Ray, Mark Tehranipoor, Domenic Forte, Md Tauhidur Rahman (2018)
LDPUF: Exploiting DRAM latency variations to generate robust device signaturesRetrieved from http://arxiv.org/abs/1808.02584.
B. Gassend, Dwaine Clarke, Marten Dijk, S. Devadas (2002)
Silicon physical random functions
Harsha Mandadi (2017)
Remote Integrity Checking using Multiple PUF based Component Identifiers
Charles Herder, M. Yu, F. Koushanfar, S. Devadas (2014)
Physical Unclonable Functions and Applications: A TutorialProceedings of the IEEE, 102
P. Prabhu, Ameen Akel, Laura Grupp, Wing-Kei Yu, G. Suh, E. Kan, S. Swanson (2011)
Extracting Device Fingerprints from Flash Memory by Exploiting Physical Variations
G. Suh, S. Devadas (2007)
Physical Unclonable Functions for Device Authentication and Secret Key Generation2007 44th ACM/IEEE Design Automation Conference
S. Sakib, A. Milenković, Md. Rahman, B. Ray (2020)
An Aging-Resistant NAND Flash Memory Physical Unclonable FunctionIEEE Transactions on Electron Devices, 67
J. Guajardo, Sandeep Kumar, G. Schrijen, P. Tuyls (2007)
FPGA Intrinsic PUFs and Their Use for IP Protection
R. Pappu, Ben Recht, Jason Taylor, N. Gershenfeld (2002)
Physical One-Way FunctionsScience, 297
(2018)
LDPUF: Exploiting DRAM latency variations to generate robust device signatures. Retrieved from http://arxiv.org/abs/1808. 02584
Electronic device fingerprints, unique bit vectors extracted from device's physical properties, are used to differentiate between instances of functionally identical devices. This article introduces a new technique that extracts fingerprints from unique properties of partially erased NOR flash memory cells in modern microcontrollers. NOR flash memories integrated in modern systems-on-a-chip typically hold firmware and read-only data, but they are increasingly in-system-programmable, allowing designers to erase and program them during normal operation. The proposed technique leverages partial erase operations of flash memory segments that bring them into the state that exposes physical properties of the flash memory cells through a digital interface. These properties reflect semiconductor process variations and defects that are unique to each microcontroller or a flash memory segment within a microcontroller. The article explores threshold voltage variation in NOR flash memory cells for generating fingerprints and describes an algorithm for extracting fingerprints. The experimental evaluation utilizing a family of commercial microcontrollers demonstrates that the proposed technique is cost-effective, robust, and resilient to changes in voltage and temperature as well as to aging effects.
ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery
Published: Mar 27, 2021
Keywords: NOR flash memory
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