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legaSCi: Legacy SystemC Model Integration into Parallel Simulators

legaSCi: Legacy SystemC Model Integration into Parallel Simulators legaSCi: Legacy SystemC Model Integration into Parallel Simulators CHRISTOPH SCHUMACHER, JAN HENRIK WEINSTOCK, RAINER LEUPERS, and GERD ASCHEID, RWTH Aachen University LAURA TOSORATTO and ALESSANDRO LONARDO, Istituto Nazionale di Fisica Nucleare DIETMAR PETRAS and ANDREAS HOFFMANN, Synopsys GmbH Architects and developers use virtual prototypes of computer systems to receive early feedback on hardware design decisions as well as to develop and debug system software. This is facilitated by the comprehensive inspection capabilities virtual prototypes offer. For virtual prototypes, execution speed is crucial to support the users' productivity. Parallel simulation techniques are employed to offset the speed impact of the increasing number of cores that need to be simulated in virtual prototypes of parallel and embedded systems. SystemC is the de facto industry standard library for virtual platform modeling. Since currently no parallel SystemC library is commonly available, typical SystemC models are coded for execution in sequential simulation environments. Simply putting such models into parallel simulators may lead to thread-safety issues and may additionally cause nondeterministic simulator behavior. This article proposes a methodology to support simulation creators to face the challenge of integrating such legacy models into parallel SystemC environments. The feasibility of the proposed method is evaluated by http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Embedded Computing Systems (TECS) Association for Computing Machinery

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References (24)

Publisher
Association for Computing Machinery
Copyright
Copyright © 2014 by ACM Inc.
ISSN
1539-9087
DOI
10.1145/2678018
Publisher site
See Article on Publisher Site

Abstract

legaSCi: Legacy SystemC Model Integration into Parallel Simulators CHRISTOPH SCHUMACHER, JAN HENRIK WEINSTOCK, RAINER LEUPERS, and GERD ASCHEID, RWTH Aachen University LAURA TOSORATTO and ALESSANDRO LONARDO, Istituto Nazionale di Fisica Nucleare DIETMAR PETRAS and ANDREAS HOFFMANN, Synopsys GmbH Architects and developers use virtual prototypes of computer systems to receive early feedback on hardware design decisions as well as to develop and debug system software. This is facilitated by the comprehensive inspection capabilities virtual prototypes offer. For virtual prototypes, execution speed is crucial to support the users' productivity. Parallel simulation techniques are employed to offset the speed impact of the increasing number of cores that need to be simulated in virtual prototypes of parallel and embedded systems. SystemC is the de facto industry standard library for virtual platform modeling. Since currently no parallel SystemC library is commonly available, typical SystemC models are coded for execution in sequential simulation environments. Simply putting such models into parallel simulators may lead to thread-safety issues and may additionally cause nondeterministic simulator behavior. This article proposes a methodology to support simulation creators to face the challenge of integrating such legacy models into parallel SystemC environments. The feasibility of the proposed method is evaluated by

Journal

ACM Transactions on Embedded Computing Systems (TECS)Association for Computing Machinery

Published: Dec 15, 2014

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