Abstract

Energy Modeling of Software for a Hardware Multithreaded Embedded Microprocessor STEVE KERRISON and KERSTIN EDER, University of Bristol This article examines a hardware multithreaded microprocessor and discusses the impact such an architecture has on existing software energy modeling techniques. A framework is constructed for analyzing the energy behavior of the XMOS XS1-L multithreaded processor and a variation on existing software energy models is proposed, based on analysis of collected energy data. It is shown that by combining execution statistics with sufficient data on the processor's thread activity and instruction execution costs, a multithreaded software energy model used with Instruction Set Simulation can yield an average error margin of less than 7%. Categories and Subject Descriptors: C.1.4 [Processor Architectures]: Parallel Architectures; C.3 [Special Purpose and Application-Based Systems]: Real-time and Embedded Systems; C.4 [Performance of Systems]: Modeling Techniques General Terms: Measurement, Performance Additional Key Words and Phrases: Software energy modeling, multithreading, ISA-level energy modeling, embedded systems, computer architecture, XMOS XS1 xCORE ACM Reference Format: Steve Kerrison and Kerstin Eder. 2015. Energy modeling of software for a hardware multithreaded embedded microprocessor. ACM Trans. Embedd. Comput. Syst. 14, 3, Article 56 (April 2015), 25 pages. DOI: http://dx.doi.org/10.1145/2700104 1. INTRODUCTION The energy consumed