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Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations

Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations SEUNGKYUN KIM, Seoul National University KIWON KWON, QUALCOMM Korea CHIHUN KIM, NEXON Co. CHOONKI JANG, JAEJIN LEE, and SANG LYUL MIN, Seoul National University In this article, we propose an application-speci c demand paging mechanism for low-end embedded systems that have ‚ash memory as secondary storage. These systems are not equipped with virtual memory. A small memory space called an execution buffer is used to page the code of an application. An application-speci c page manager manages the buffer. The page manager is automatically generated by a compiler post-pass optimizer and combined with the application image. The post-pass optimizer analyzes the executable image and transforms function call/return instructions into calls to the page manager. As a result, each function in the code can be loaded into the memory on demand at runtime. To minimize the overhead incurred by the demand paging technique, code clustering algorithms are also presented. We evaluate our techniques with ten embedded applications, and our approach can reduce the code memory size by on average 39.5% with less than 10% performance degradation and on average 14% more energy consumption. Our demand paging technique provides embedded http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Embedded Computing Systems (TECS) Association for Computing Machinery

Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations

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References (32)

Publisher
Association for Computing Machinery
Copyright
Copyright © 2011 by ACM Inc.
ISSN
1539-9087
DOI
10.1145/2043662.2043664
Publisher site
See Article on Publisher Site

Abstract

Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations SEUNGKYUN KIM, Seoul National University KIWON KWON, QUALCOMM Korea CHIHUN KIM, NEXON Co. CHOONKI JANG, JAEJIN LEE, and SANG LYUL MIN, Seoul National University In this article, we propose an application-speci c demand paging mechanism for low-end embedded systems that have ‚ash memory as secondary storage. These systems are not equipped with virtual memory. A small memory space called an execution buffer is used to page the code of an application. An application-speci c page manager manages the buffer. The page manager is automatically generated by a compiler post-pass optimizer and combined with the application image. The post-pass optimizer analyzes the executable image and transforms function call/return instructions into calls to the page manager. As a result, each function in the code can be loaded into the memory on demand at runtime. To minimize the overhead incurred by the demand paging technique, code clustering algorithms are also presented. We evaluate our techniques with ten embedded applications, and our approach can reduce the code memory size by on average 39.5% with less than 10% performance degradation and on average 14% more energy consumption. Our demand paging technique provides embedded

Journal

ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery

Published: Nov 1, 2011

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