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Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems

Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems KENI QIU, MENGYING ZHAO, and CHUN JASON XUE, City University of Hong Kong ALEX ORAILOGLU, University of California, San Diego Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often adopted to improve cache access predictability in Worst-Case Execution Time (WCET) analysis. Static cache locking methods have been proposed recently to improve Average-Case Execution Time (ACET) performance. This article presents an approach, Branch Prediction-directed Dynamic Cache Locking (BPDCL), to improve system performance through cache conflict miss reduction. In the proposed approach, the control flow graph of a program is first partitioned into disjoint execution regions, then memory blocks worth locking are determined by calculating the locking profit for each region. These two steps are conducted during compilation time. At runtime, directed by branch predictions, locking routines are prefetched into a small high-speed buffer. The predetermined cache locking contents are loaded and locked at specific execution points during program execution. Experimental results show that the proposed BPDCL method exhibits an average improvement of 25.9%, 13.8%, and 8.0% on cache miss rate reduction in comparison to cases with no cache locking, the http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Embedded Computing Systems (TECS) Association for Computing Machinery

Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems

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References (30)

Publisher
Association for Computing Machinery
Copyright
Copyright © 2014 by ACM Inc.
ISSN
1539-9087
DOI
10.1145/2660492
Publisher site
See Article on Publisher Site

Abstract

Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems KENI QIU, MENGYING ZHAO, and CHUN JASON XUE, City University of Hong Kong ALEX ORAILOGLU, University of California, San Diego Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often adopted to improve cache access predictability in Worst-Case Execution Time (WCET) analysis. Static cache locking methods have been proposed recently to improve Average-Case Execution Time (ACET) performance. This article presents an approach, Branch Prediction-directed Dynamic Cache Locking (BPDCL), to improve system performance through cache conflict miss reduction. In the proposed approach, the control flow graph of a program is first partitioned into disjoint execution regions, then memory blocks worth locking are determined by calculating the locking profit for each region. These two steps are conducted during compilation time. At runtime, directed by branch predictions, locking routines are prefetched into a small high-speed buffer. The predetermined cache locking contents are loaded and locked at specific execution points during program execution. Experimental results show that the proposed BPDCL method exhibits an average improvement of 25.9%, 13.8%, and 8.0% on cache miss rate reduction in comparison to cases with no cache locking, the

Journal

ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery

Published: Oct 6, 2014

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