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An Analytical Model for On-Chip Interconnects in Multimedia Embedded Systems YULEI WU, Chinese Academy of Sciences GEYONG MIN, University of Bradford DAKAI ZHU, University of Texas at San Antonio LAURENCE T. YANG, St. Francis Xavier University The traffic pattern has significant impact on the performance of network-on-chip. Many recent studies have shown that multimedia applications can be supported in on-chip interconnects. Driven by the motivation of evaluating on-chip interconnects in multimedia embedded systems, a new analytical model is proposed to investigate the performance of the fat-tree based on-chip interconnection network under bursty multimedia traffic and nonuniform message destinations. Extensive simulation experiments are conducted to validate the accuracy of the model, which is then adopted as a cost-efficient tool to investigate the effects of bursty multimedia traffic with nonuniform destinations on the network performance. Categories and Subject Descriptors: C.2.1 [Computer-Communication Networks]: Network Architecture and Design; C.4 [Performance of Systems] General Terms: Performance Additional Key Words and Phrases: Networks-on-Chip, bursty multimedia traffic, nonuniform destination distributions, analytical modeling ACM Reference Format: Wu, Y., Min, G., Zhu, D., and Yang, L. T. 2013. An analytical model for on-chip interconnects in multimedia embedded systems. ACM Trans. Embedd. Comput. Syst. 13, 1s, Article 29
ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery
Published: Nov 1, 2013
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